From c8d82d465c03b4d7e18ab1ba1bfce6581d2aad6e Mon Sep 17 00:00:00 2001 From: Mahantesh Kumbar Date: Thu, 12 Jan 2017 10:45:51 +0530 Subject: gpu: nvgpu: HAL to query LPWR feature support HAL to query LPWR feautre's RPPG/MSCG support based on current pstate configured. JIRA DNVGPU-71 Change-Id: I58a34c6dca68e3eb76e222bd781578bf682eac34 Signed-off-by: Mahantesh Kumbar Reviewed-on: http://git-master/r/1283916 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu --- drivers/gpu/nvgpu/gk20a/gk20a.h | 2 ++ drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | 1 + drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | 3 +++ drivers/gpu/nvgpu/gm206/pmu_gm206.c | 3 ++- drivers/gpu/nvgpu/gm20b/pmu_gm20b.c | 3 ++- drivers/gpu/nvgpu/gp106/pmu_gp106.c | 22 ++++++++++++++++++++++ drivers/gpu/nvgpu/gp10b/pmu_gp10b.c | 1 + 7 files changed, 33 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/nvgpu') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index ff8ffc4f..5e2344cf 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -610,6 +610,8 @@ struct gpu_ops { u32 (*pmu_pg_supported_engines_list)(struct gk20a *g); u32 (*pmu_pg_engines_feature_list)(struct gk20a *g, u32 pg_engine_id); + bool (*pmu_is_lpwr_feature_supported)(struct gk20a *g, + u32 feature_id); int (*pmu_lpwr_enable_pg)(struct gk20a *g, bool pstate_lock); int (*pmu_lpwr_disable_pg)(struct gk20a *g, bool pstate_lock); u32 (*pmu_pg_param_post_init)(struct gk20a *g); diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c index 1aa423a8..ef6a5943 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c @@ -3302,6 +3302,7 @@ void gk20a_init_pmu_ops(struct gpu_ops *gops) gops->pmu.pmu_pg_init_param = NULL; gops->pmu.pmu_pg_supported_engines_list = gk20a_pmu_pg_engines_list; gops->pmu.pmu_pg_engines_feature_list = gk20a_pmu_pg_feature_list; + gops->pmu.pmu_is_lpwr_feature_supported = NULL; gops->pmu.pmu_lpwr_enable_pg = NULL; gops->pmu.pmu_lpwr_disable_pg = NULL; gops->pmu.pmu_pg_param_post_init = NULL; diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h index 0a1d2ba3..daa050af 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h @@ -647,6 +647,9 @@ struct pmu_pg_stats { #define PMU_PG_ELPG_ENGINE_ID_INVALID_ENGINE (0x00000005) #define PMU_PG_ELPG_ENGINE_MAX PMU_PG_ELPG_ENGINE_ID_INVALID_ENGINE +#define PMU_PG_LPWR_FEATURE_RPPG 0x0 +#define PMU_PG_LPWR_FEATURE_MSCG 0x1 + /* state transition : OFF => [OFF_ON_PENDING optional] => ON_PENDING => ON => OFF ON => OFF is always synchronized */ diff --git a/drivers/gpu/nvgpu/gm206/pmu_gm206.c b/drivers/gpu/nvgpu/gm206/pmu_gm206.c index 44ef8ae7..2b3c1b50 100644 --- a/drivers/gpu/nvgpu/gm206/pmu_gm206.c +++ b/drivers/gpu/nvgpu/gm206/pmu_gm206.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -161,6 +161,7 @@ void gm206_init_pmu_ops(struct gpu_ops *gops) gops->pmu.pmu_pg_supported_engines_list = NULL; gops->pmu.pmu_pg_engines_feature_list = NULL; gops->pmu.pmu_lpwr_enable_pg = NULL; + gops->pmu.pmu_is_lpwr_feature_supported = NULL; gops->pmu.pmu_lpwr_disable_pg = NULL; gops->pmu.pmu_pg_param_post_init = NULL; gops->pmu.send_lrf_tex_ltc_dram_overide_en_dis_cmd = NULL; diff --git a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c index 08a7e170..2e568e83 100644 --- a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c @@ -1,7 +1,7 @@ /* * GM20B PMU * - * Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -291,6 +291,7 @@ void gm20b_init_pmu_ops(struct gpu_ops *gops) gops->pmu.pmu_pg_init_param = NULL; gops->pmu.pmu_pg_supported_engines_list = gk20a_pmu_pg_engines_list; gops->pmu.pmu_pg_engines_feature_list = gk20a_pmu_pg_feature_list; + gops->pmu.pmu_is_lpwr_feature_supported = NULL; gops->pmu.pmu_lpwr_enable_pg = NULL; gops->pmu.pmu_lpwr_disable_pg = NULL; gops->pmu.pmu_pg_param_post_init = NULL; diff --git a/drivers/gpu/nvgpu/gp106/pmu_gp106.c b/drivers/gpu/nvgpu/gp106/pmu_gp106.c index f294b1e0..8d552a5b 100644 --- a/drivers/gpu/nvgpu/gp106/pmu_gp106.c +++ b/drivers/gpu/nvgpu/gp106/pmu_gp106.c @@ -279,6 +279,26 @@ static void gp106_pmu_elpg_statistics(struct gk20a *g, u32 pg_engine_id, pg_stat_data->avg_exit_latency_us = stats.exit_latency_avg_us; } +static bool gp106_pmu_is_lpwr_feature_supported(struct gk20a *g, u32 feature_id) +{ + bool is_feature_supported = false; + + switch (feature_id) { + case PMU_PG_LPWR_FEATURE_RPPG: + is_feature_supported = nvgpu_lpwr_is_rppg_supported(g, + nvgpu_clk_arb_get_current_pstate(g)); + break; + case PMU_PG_LPWR_FEATURE_MSCG: + is_feature_supported = nvgpu_lpwr_is_mscg_supported(g, + nvgpu_clk_arb_get_current_pstate(g)); + break; + default: + is_feature_supported = false; + } + + return is_feature_supported; +} + void gp106_init_pmu_ops(struct gpu_ops *gops) { gk20a_dbg_fn(""); @@ -304,6 +324,8 @@ void gp106_init_pmu_ops(struct gpu_ops *gops) gops->pmu.pmu_pg_init_param = gp106_pg_param_init; gops->pmu.pmu_pg_supported_engines_list = gp106_pmu_pg_engines_list; gops->pmu.pmu_pg_engines_feature_list = gp106_pmu_pg_feature_list; + gops->pmu.pmu_is_lpwr_feature_supported = + gp106_pmu_is_lpwr_feature_supported; gops->pmu.pmu_lpwr_enable_pg = nvgpu_lpwr_enable_pg; gops->pmu.pmu_lpwr_disable_pg = nvgpu_lpwr_disable_pg; gops->pmu.pmu_pg_param_post_init = nvgpu_lpwr_post_init; diff --git a/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c b/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c index fc535985..cf216941 100644 --- a/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/pmu_gp10b.c @@ -487,6 +487,7 @@ void gp10b_init_pmu_ops(struct gpu_ops *gops) gops->pmu.pmu_pg_init_param = gp10b_pg_gr_init; gops->pmu.pmu_pg_supported_engines_list = gk20a_pmu_pg_engines_list; gops->pmu.pmu_pg_engines_feature_list = gk20a_pmu_pg_feature_list; + gops->pmu.pmu_is_lpwr_feature_supported = NULL; gops->pmu.pmu_lpwr_enable_pg = NULL; gops->pmu.pmu_lpwr_disable_pg = NULL; gops->pmu.pmu_pg_param_post_init = NULL; -- cgit v1.2.2