From b8efd9d04537d6129e2ce8b067417e46b0e7436f Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Thu, 27 Jul 2017 12:58:03 -0700 Subject: gpu: nvgpu: Make LTC disabling common code Refactor the sync_debugfs LTC HAL op so that the logic to enable or disable LTC goes to common code nvgpu_ltc_sync_enabled() and the LTC HAL set_enabled only performs the hardware register access. Create a new common function nvgpu_init_ltc_support() to initialize the LTC software variable, and move hardware initialization of LTC to be called from it. JIRA NVGPU-62 Change-Id: Ib1cf4f5b83ca3dac08407464ed56a732e0a33923 Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1528262 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/Makefile.nvgpu | 1 + drivers/gpu/nvgpu/common/linux/debug.c | 7 +----- drivers/gpu/nvgpu/common/ltc.c | 42 +++++++++++++++++++++++++++++++++ drivers/gpu/nvgpu/gk20a/channel_gk20a.c | 6 ++--- drivers/gpu/nvgpu/gk20a/gk20a.c | 8 +++++-- drivers/gpu/nvgpu/gk20a/gk20a.h | 7 +++--- drivers/gpu/nvgpu/gk20a/ltc_gk20a.c | 2 -- drivers/gpu/nvgpu/gk20a/mm_gk20a.h | 10 ++------ drivers/gpu/nvgpu/gm20b/hal_gm20b.c | 4 +--- drivers/gpu/nvgpu/gm20b/ltc_gm20b.c | 26 +++++++------------- drivers/gpu/nvgpu/gm20b/ltc_gm20b.h | 4 +--- drivers/gpu/nvgpu/gp106/hal_gp106.c | 4 +--- drivers/gpu/nvgpu/gp10b/hal_gp10b.c | 4 +--- drivers/gpu/nvgpu/gp10b/ltc_gp10b.c | 26 +++++++------------- drivers/gpu/nvgpu/gp10b/ltc_gp10b.h | 4 +--- drivers/gpu/nvgpu/include/nvgpu/ltc.h | 21 +++++++++++++++++ 16 files changed, 101 insertions(+), 75 deletions(-) create mode 100644 drivers/gpu/nvgpu/common/ltc.c create mode 100644 drivers/gpu/nvgpu/include/nvgpu/ltc.h (limited to 'drivers/gpu/nvgpu') diff --git a/drivers/gpu/nvgpu/Makefile.nvgpu b/drivers/gpu/nvgpu/Makefile.nvgpu index ffe78097..2aa76497 100644 --- a/drivers/gpu/nvgpu/Makefile.nvgpu +++ b/drivers/gpu/nvgpu/Makefile.nvgpu @@ -66,6 +66,7 @@ nvgpu-y := \ common/pmu/pmu_fw.o \ common/pmu/pmu_pg.o \ common/pmu/pmu_perfmon.o \ + common/ltc.o \ gk20a/gk20a.o \ gk20a/bus_gk20a.o \ gk20a/pramin_gk20a.o \ diff --git a/drivers/gpu/nvgpu/common/linux/debug.c b/drivers/gpu/nvgpu/common/linux/debug.c index e085aed4..a846493e 100644 --- a/drivers/gpu/nvgpu/common/linux/debug.c +++ b/drivers/gpu/nvgpu/common/linux/debug.c @@ -275,15 +275,10 @@ void gk20a_debug_init(struct gk20a *g, const char *debugfs_symlink) debugfs_create_u32("log_trace", S_IRUGO|S_IWUSR, platform->debugfs, &g->log_trace); - nvgpu_spinlock_init(&g->debugfs_lock); - - g->mm.ltc_enabled = true; - g->mm.ltc_enabled_debug = true; - g->debugfs_ltc_enabled = debugfs_create_bool("ltc_enabled", S_IRUGO|S_IWUSR, platform->debugfs, - &g->mm.ltc_enabled_debug); + &g->mm.ltc_enabled_target); g->debugfs_gr_idle_timeout_default = debugfs_create_u32("gr_idle_timeout_default_us", diff --git a/drivers/gpu/nvgpu/common/ltc.c b/drivers/gpu/nvgpu/common/ltc.c new file mode 100644 index 00000000..0965caa3 --- /dev/null +++ b/drivers/gpu/nvgpu/common/ltc.c @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include + +#include "gk20a/gk20a.h" + +int nvgpu_init_ltc_support(struct gk20a *g) +{ + nvgpu_spinlock_init(&g->ltc_enabled_lock); + + g->mm.ltc_enabled_current = true; + g->mm.ltc_enabled_target = true; + + if (g->ops.ltc.init_fs_state) + g->ops.ltc.init_fs_state(g); + + return 0; +} + +void nvgpu_ltc_sync_enabled(struct gk20a *g) +{ + nvgpu_spinlock_acquire(&g->ltc_enabled_lock); + if (g->mm.ltc_enabled_current != g->mm.ltc_enabled_target) { + g->ops.ltc.set_enabled(g, g->mm.ltc_enabled_target); + g->mm.ltc_enabled_current = g->mm.ltc_enabled_target; + } + nvgpu_spinlock_release(&g->ltc_enabled_lock); +} diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c index 87923537..62b312b2 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c @@ -34,6 +34,7 @@ #include #include #include +#include #include "gk20a.h" #include "ctxsw_trace_gk20a.h" @@ -2490,11 +2491,8 @@ int gk20a_submit_channel_gpfifo(struct channel_gk20a *c, if (profile) profile->timestamp[PROFILE_ENTRY] = sched_clock(); -#ifdef CONFIG_DEBUG_FS /* update debug settings */ - if (g->ops.ltc.sync_debugfs) - g->ops.ltc.sync_debugfs(g); -#endif + nvgpu_ltc_sync_enabled(g); gk20a_dbg_info("channel %d", c->chid); diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c index 6350bcf5..7d577cda 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a.c @@ -26,6 +26,7 @@ #include #include #include +#include #include @@ -216,8 +217,11 @@ int gk20a_finalize_poweron(struct gk20a *g) goto done; } - if (g->ops.ltc.init_fs_state) - g->ops.ltc.init_fs_state(g); + err = nvgpu_init_ltc_support(g); + if (err) { + nvgpu_err(g, "failed to init ltc"); + goto done; + } err = gk20a_init_mm_support(g); if (err) { diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 8d9318b2..f7b714f2 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -144,9 +144,7 @@ struct gpu_ops { struct zbc_entry *s_val, u32 index); void (*init_cbc)(struct gk20a *g, struct gr_gk20a *gr); -#ifdef CONFIG_DEBUG_FS - void (*sync_debugfs)(struct gk20a *g); -#endif + void (*set_enabled)(struct gk20a *g, bool enabled); void (*init_fs_state)(struct gk20a *g); void (*isr)(struct gk20a *g); u32 (*cbc_fix_config)(struct gk20a *g, int base); @@ -1147,8 +1145,9 @@ struct gk20a { u32 emc3d_ratio; + struct nvgpu_spinlock ltc_enabled_lock; + #ifdef CONFIG_DEBUG_FS - struct nvgpu_spinlock debugfs_lock; struct dentry *debugfs_ltc_enabled; struct dentry *debugfs_timeouts_enabled; struct dentry *debugfs_gr_idle_timeout_default; diff --git a/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c b/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c index a543a0d3..1b834a47 100644 --- a/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c @@ -21,8 +21,6 @@ #include "gk20a.h" #include "gr_gk20a.h" -/* Non HW reg dependent stuff: */ - int gk20a_ltc_alloc_phys_cbc(struct gk20a *g, size_t compbit_backing_size) { struct gr_gk20a *gr = &g->gr; diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h index 2f35df71..c56b28bb 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h @@ -245,14 +245,8 @@ struct mm_gk20a { bool sw_ready; int physical_bits; bool use_full_comp_tag_line; -#ifdef CONFIG_DEBUG_FS - u32 ltc_enabled; -#if LINUX_VERSION_CODE < KERNEL_VERSION(4,4,0) - u32 ltc_enabled_debug; -#else - bool ltc_enabled_debug; -#endif -#endif + bool ltc_enabled_current; + bool ltc_enabled_target; #if LINUX_VERSION_CODE < KERNEL_VERSION(4,4,0) u32 bypass_smmu; u32 disable_bigpage; diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index c16cd3e5..7861e438 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c @@ -155,9 +155,7 @@ static const struct gpu_ops gm20b_ops = { .isr = gm20b_ltc_isr, .cbc_fix_config = gm20b_ltc_cbc_fix_config, .flush = gm20b_flush_ltc, -#ifdef CONFIG_DEBUG_FS - .sync_debugfs = gm20b_ltc_sync_debugfs, -#endif + .set_enabled = gm20b_ltc_set_enabled, }, .ce2 = { .isr_stall = gk20a_ce2_isr, diff --git a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c index 5e938141..6fef01ea 100644 --- a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c @@ -437,25 +437,17 @@ void gm20b_ltc_init_cbc(struct gk20a *g, struct gr_gk20a *gr) } -#ifdef CONFIG_DEBUG_FS -void gm20b_ltc_sync_debugfs(struct gk20a *g) +void gm20b_ltc_set_enabled(struct gk20a *g, bool enabled) { u32 reg_f = ltc_ltcs_ltss_tstg_set_mgmt_2_l2_bypass_mode_enabled_f(); + u32 reg = gk20a_readl(g, ltc_ltcs_ltss_tstg_set_mgmt_2_r()); - nvgpu_spinlock_acquire(&g->debugfs_lock); - if (g->mm.ltc_enabled != g->mm.ltc_enabled_debug) { - u32 reg = gk20a_readl(g, ltc_ltcs_ltss_tstg_set_mgmt_2_r()); - - if (g->mm.ltc_enabled_debug) - /* bypass disabled (normal caching ops)*/ - reg &= ~reg_f; - else - /* bypass enabled (no caching) */ - reg |= reg_f; + if (enabled) + /* bypass disabled (normal caching ops)*/ + reg &= ~reg_f; + else + /* bypass enabled (no caching) */ + reg |= reg_f; - gk20a_writel(g, ltc_ltcs_ltss_tstg_set_mgmt_2_r(), reg); - g->mm.ltc_enabled = g->mm.ltc_enabled_debug; - } - nvgpu_spinlock_release(&g->debugfs_lock); + gk20a_writel(g, ltc_ltcs_ltss_tstg_set_mgmt_2_r(), reg); } -#endif diff --git a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.h b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.h index 3b4b16e3..bfd501d6 100644 --- a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.h @@ -26,9 +26,7 @@ void gm20b_ltc_set_zbc_depth_entry(struct gk20a *g, struct zbc_entry *depth_val, u32 index); void gm20b_ltc_init_cbc(struct gk20a *g, struct gr_gk20a *gr); -#ifdef CONFIG_DEBUG_FS -void gm20b_ltc_sync_debugfs(struct gk20a *g); -#endif +void gm20b_ltc_set_enabled(struct gk20a *g, bool enabled); void gm20b_ltc_init_fs_state(struct gk20a *g); int gm20b_ltc_cbc_ctrl(struct gk20a *g, enum gk20a_cbc_op op, u32 min, u32 max); diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 38778da7..4a891a82 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c @@ -204,9 +204,7 @@ static const struct gpu_ops gp106_ops = { .isr = gp10b_ltc_isr, .cbc_fix_config = NULL, .flush = gm20b_flush_ltc, -#ifdef CONFIG_DEBUG_FS - .sync_debugfs = gp10b_ltc_sync_debugfs, -#endif + .set_enabled = gp10b_ltc_set_enabled, }, .ce2 = { .isr_stall = gp10b_ce_isr, diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index e2479530..197c4fad 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c @@ -164,9 +164,7 @@ static const struct gpu_ops gp10b_ops = { .isr = gp10b_ltc_isr, .cbc_fix_config = gm20b_ltc_cbc_fix_config, .flush = gm20b_flush_ltc, -#ifdef CONFIG_DEBUG_FS - .sync_debugfs = gp10b_ltc_sync_debugfs, -#endif + .set_enabled = gp10b_ltc_set_enabled, }, .ce2 = { .isr_stall = gp10b_ce_isr, diff --git a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c b/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c index baa275c7..43619f80 100644 --- a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c @@ -205,25 +205,17 @@ void gp10b_ltc_init_fs_state(struct gk20a *g) ltc_intr); } -#ifdef CONFIG_DEBUG_FS -void gp10b_ltc_sync_debugfs(struct gk20a *g) +void gp10b_ltc_set_enabled(struct gk20a *g, bool enabled) { u32 reg_f = ltc_ltcs_ltss_tstg_set_mgmt_2_l2_bypass_mode_enabled_f(); + u32 reg = gk20a_readl(g, ltc_ltcs_ltss_tstg_set_mgmt_2_r()); - nvgpu_spinlock_acquire(&g->debugfs_lock); - if (g->mm.ltc_enabled != g->mm.ltc_enabled_debug) { - u32 reg = gk20a_readl(g, ltc_ltcs_ltss_tstg_set_mgmt_2_r()); - - if (g->mm.ltc_enabled_debug) - /* bypass disabled (normal caching ops)*/ - reg &= ~reg_f; - else - /* bypass enabled (no caching) */ - reg |= reg_f; + if (enabled) + /* bypass disabled (normal caching ops)*/ + reg &= ~reg_f; + else + /* bypass enabled (no caching) */ + reg |= reg_f; - gk20a_writel(g, ltc_ltcs_ltss_tstg_set_mgmt_2_r(), reg); - g->mm.ltc_enabled = g->mm.ltc_enabled_debug; - } - nvgpu_spinlock_release(&g->debugfs_lock); + gk20a_writel(g, ltc_ltcs_ltss_tstg_set_mgmt_2_r(), reg); } -#endif diff --git a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.h b/drivers/gpu/nvgpu/gp10b/ltc_gp10b.h index b5f2cda6..385754ba 100644 --- a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/ltc_gp10b.h @@ -20,7 +20,5 @@ void gp10b_ltc_isr(struct gk20a *g); int gp10b_determine_L2_size_bytes(struct gk20a *g); int gp10b_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr); void gp10b_ltc_init_fs_state(struct gk20a *g); -#ifdef CONFIG_DEBUG_FS -void gp10b_ltc_sync_debugfs(struct gk20a *g); -#endif +void gp10b_ltc_set_enabled(struct gk20a *g, bool enabled); #endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/ltc.h b/drivers/gpu/nvgpu/include/nvgpu/ltc.h new file mode 100644 index 00000000..89721158 --- /dev/null +++ b/drivers/gpu/nvgpu/include/nvgpu/ltc.h @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ +#ifndef __NVGPU_LTC_H__ +#define __NVGPU_LTC_H__ + +struct gk20a; + +int nvgpu_init_ltc_support(struct gk20a *g); +void nvgpu_ltc_sync_enabled(struct gk20a *g); + +#endif -- cgit v1.2.2