From b06afbfe23a667a23cfc425b1b88a755c4e82294 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Wed, 31 Jan 2018 15:12:00 -0800 Subject: gpu: nvgpu: Use #define for log masks Log masks are a bitmask, and passed as u32 through the API calls. They were still defined as enums, which causes unnecessary implicit conversions. Convert the log masks to be defined as u32. JIRA NVGPU-52 Change-Id: I4b20f0ad2a9f18056502940ea677b3ea8526d830 Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1649816 GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/include/nvgpu/log.h | 56 +++++++++++++++++------------------ 1 file changed, 27 insertions(+), 29 deletions(-) (limited to 'drivers/gpu/nvgpu') diff --git a/drivers/gpu/nvgpu/include/nvgpu/log.h b/drivers/gpu/nvgpu/include/nvgpu/log.h index 7d7a41e3..183948cd 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/log.h +++ b/drivers/gpu/nvgpu/include/nvgpu/log.h @@ -53,35 +53,33 @@ void __nvgpu_log_dbg(struct gk20a *g, u32 log_mask, */ #define NVGPU_DEFAULT_DBG_MASK (0) -enum nvgpu_log_categories { - gpu_dbg_info = BIT(0), /* Lightly verbose info. */ - gpu_dbg_fn = BIT(1), /* Function name tracing. */ - gpu_dbg_reg = BIT(2), /* Register accesses; very verbose. */ - gpu_dbg_pte = BIT(3), /* GMMU PTEs. */ - gpu_dbg_intr = BIT(4), /* Interrupts. */ - gpu_dbg_pmu = BIT(5), /* gk20a pmu. */ - gpu_dbg_clk = BIT(6), /* gk20a clk. */ - gpu_dbg_map = BIT(7), /* Memory mappings. */ - gpu_dbg_map_v = BIT(8), /* Verbose mem mappings. */ - gpu_dbg_gpu_dbg = BIT(9), /* GPU debugger/profiler. */ - gpu_dbg_cde = BIT(10), /* cde info messages. */ - gpu_dbg_cde_ctx = BIT(11), /* cde context usage messages. */ - gpu_dbg_ctxsw = BIT(12), /* ctxsw tracing. */ - gpu_dbg_sched = BIT(13), /* Sched control tracing. */ - gpu_dbg_sema = BIT(14), /* Semaphore debugging. */ - gpu_dbg_sema_v = BIT(15), /* Verbose semaphore debugging. */ - gpu_dbg_pmu_pstate = BIT(16), /* p state controlled by pmu. */ - gpu_dbg_xv = BIT(17), /* XVE debugging. */ - gpu_dbg_shutdown = BIT(18), /* GPU shutdown tracing. */ - gpu_dbg_kmem = BIT(19), /* Kmem tracking debugging. */ - gpu_dbg_pd_cache = BIT(20), /* PD cache traces. */ - gpu_dbg_alloc = BIT(21), /* Allocator debugging. */ - gpu_dbg_dma = BIT(22), /* DMA allocation prints. */ - gpu_dbg_sgl = BIT(23), /* SGL related traces. */ - gpu_dbg_vidmem = BIT(24), /* VIDMEM tracing. */ - gpu_dbg_nvlink = BIT(25), /* nvlink Operation tracing. */ - gpu_dbg_mem = BIT(31), /* memory accesses; very verbose. */ -}; +#define gpu_dbg_info BIT(0) /* Lightly verbose info. */ +#define gpu_dbg_fn BIT(1) /* Function name tracing. */ +#define gpu_dbg_reg BIT(2) /* Register accesses; very verbose. */ +#define gpu_dbg_pte BIT(3) /* GMMU PTEs. */ +#define gpu_dbg_intr BIT(4) /* Interrupts. */ +#define gpu_dbg_pmu BIT(5) /* gk20a pmu. */ +#define gpu_dbg_clk BIT(6) /* gk20a clk. */ +#define gpu_dbg_map BIT(7) /* Memory mappings. */ +#define gpu_dbg_map_v BIT(8) /* Verbose mem mappings. */ +#define gpu_dbg_gpu_dbg BIT(9) /* GPU debugger/profiler. */ +#define gpu_dbg_cde BIT(10) /* cde info messages. */ +#define gpu_dbg_cde_ctx BIT(11) /* cde context usage messages. */ +#define gpu_dbg_ctxsw BIT(12) /* ctxsw tracing. */ +#define gpu_dbg_sched BIT(13) /* Sched control tracing. */ +#define gpu_dbg_sema BIT(14) /* Semaphore debugging. */ +#define gpu_dbg_sema_v BIT(15) /* Verbose semaphore debugging. */ +#define gpu_dbg_pmu_pstate BIT(16) /* p state controlled by pmu. */ +#define gpu_dbg_xv BIT(17) /* XVE debugging. */ +#define gpu_dbg_shutdown BIT(18) /* GPU shutdown tracing. */ +#define gpu_dbg_kmem BIT(19) /* Kmem tracking debugging. */ +#define gpu_dbg_pd_cache BIT(20) /* PD cache traces. */ +#define gpu_dbg_alloc BIT(21) /* Allocator debugging. */ +#define gpu_dbg_dma BIT(22) /* DMA allocation prints. */ +#define gpu_dbg_sgl BIT(23) /* SGL related traces. */ +#define gpu_dbg_vidmem BIT(24) /* VIDMEM tracing. */ +#define gpu_dbg_nvlink BIT(25) /* nvlink Operation tracing. */ +#define gpu_dbg_mem BIT(31) /* memory accesses; very verbose. */ /** * nvgpu_log_mask_enabled - Check if logging is enabled -- cgit v1.2.2