From a51abd7bb076e74c6b32285e327bdd6412d6c2fc Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Wed, 4 Mar 2015 15:10:38 +0530 Subject: gpu: nvgpu: do not enable unhandled exceptions We currently have below exceptions enabled but we do not have any handler for them. So if any of these exception is raised, we do not clear it. NV_PGRAPH_EXCEPTION_PD NV_PGRAPH_EXCEPTION_SCC NV_PGRAPH_EXCEPTION_DS NV_PGRAPH_EXCEPTION_MME NV_PGRAPH_EXCEPTION_SKED Hence do not enable above exceptions. Bug 200078514 Change-Id: I0dd3a2299f80f3fe06994818f64151e7cc83a84e Signed-off-by: Deepak Nibade Reviewed-on: http://git-master/r/714166 Reviewed-by: Terje Bergstrom Tested-by: Terje Bergstrom --- drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 39 -------------------------------------- drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 13 +------------ 2 files changed, 1 insertion(+), 51 deletions(-) (limited to 'drivers/gpu/nvgpu') diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 6a9e1753..4217658c 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c @@ -4176,45 +4176,6 @@ void gr_gk20a_enable_hww_exceptions(struct gk20a *g) gk20a_writel(g, gr_memfmt_hww_esr_r(), gr_memfmt_hww_esr_en_enable_f() | gr_memfmt_hww_esr_reset_active_f()); - gk20a_writel(g, gr_scc_hww_esr_r(), - gr_scc_hww_esr_en_enable_f() | - gr_scc_hww_esr_reset_active_f()); - gk20a_writel(g, gr_mme_hww_esr_r(), - gr_mme_hww_esr_en_enable_f() | - gr_mme_hww_esr_reset_active_f()); - gk20a_writel(g, gr_pd_hww_esr_r(), - gr_pd_hww_esr_en_enable_f() | - gr_pd_hww_esr_reset_active_f()); - gk20a_writel(g, gr_sked_hww_esr_r(), /* enabled by default */ - gr_sked_hww_esr_reset_active_f()); - gk20a_writel(g, gr_ds_hww_esr_r(), - gr_ds_hww_esr_en_enabled_f() | - gr_ds_hww_esr_reset_task_f()); - gk20a_writel(g, gr_ds_hww_report_mask_r(), - gr_ds_hww_report_mask_sph0_err_report_f() | - gr_ds_hww_report_mask_sph1_err_report_f() | - gr_ds_hww_report_mask_sph2_err_report_f() | - gr_ds_hww_report_mask_sph3_err_report_f() | - gr_ds_hww_report_mask_sph4_err_report_f() | - gr_ds_hww_report_mask_sph5_err_report_f() | - gr_ds_hww_report_mask_sph6_err_report_f() | - gr_ds_hww_report_mask_sph7_err_report_f() | - gr_ds_hww_report_mask_sph8_err_report_f() | - gr_ds_hww_report_mask_sph9_err_report_f() | - gr_ds_hww_report_mask_sph10_err_report_f() | - gr_ds_hww_report_mask_sph11_err_report_f() | - gr_ds_hww_report_mask_sph12_err_report_f() | - gr_ds_hww_report_mask_sph13_err_report_f() | - gr_ds_hww_report_mask_sph14_err_report_f() | - gr_ds_hww_report_mask_sph15_err_report_f() | - gr_ds_hww_report_mask_sph16_err_report_f() | - gr_ds_hww_report_mask_sph17_err_report_f() | - gr_ds_hww_report_mask_sph18_err_report_f() | - gr_ds_hww_report_mask_sph19_err_report_f() | - gr_ds_hww_report_mask_sph20_err_report_f() | - gr_ds_hww_report_mask_sph21_err_report_f() | - gr_ds_hww_report_mask_sph22_err_report_f() | - gr_ds_hww_report_mask_sph23_err_report_f()); } static void gr_gk20a_set_hww_esr_report_mask(struct gk20a *g) diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index 19340643..4c2b00a8 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c @@ -399,17 +399,6 @@ static void gr_gm20b_set_circular_buffer_size(struct gk20a *g, u32 data) } } -static void gr_gm20b_enable_hww_exceptions(struct gk20a *g) -{ - gr_gk20a_enable_hww_exceptions(g); - - gk20a_writel(g, gr_ds_hww_esr_2_r(), - gr_ds_hww_esr_2_en_enabled_f() | - gr_ds_hww_esr_2_reset_task_f()); - gk20a_writel(g, gr_ds_hww_report_mask_2_r(), - gr_ds_hww_report_mask_2_sph24_err_report_f()); -} - static void gr_gm20b_set_hww_esr_report_mask(struct gk20a *g) { /* setup sm warp esr report masks */ @@ -995,7 +984,7 @@ void gm20b_init_gr(struct gpu_ops *gops) gops->gr.handle_sw_method = gr_gm20b_handle_sw_method; gops->gr.set_alpha_circular_buffer_size = gr_gm20b_set_alpha_circular_buffer_size; gops->gr.set_circular_buffer_size = gr_gm20b_set_circular_buffer_size; - gops->gr.enable_hww_exceptions = gr_gm20b_enable_hww_exceptions; + gops->gr.enable_hww_exceptions = gr_gk20a_enable_hww_exceptions; gops->gr.is_valid_class = gr_gm20b_is_valid_class; gops->gr.get_sm_dsm_perf_regs = gr_gm20b_get_sm_dsm_perf_regs; gops->gr.get_sm_dsm_perf_ctrl_regs = gr_gm20b_get_sm_dsm_perf_ctrl_regs; -- cgit v1.2.2