From 8522004c00264646feeb30ede3214f46ddbea04d Mon Sep 17 00:00:00 2001 From: Mahantesh Kumbar Date: Tue, 31 Jan 2017 20:39:21 +0530 Subject: gpu: nvgpu: Falcon-controller interface update Moved falcon-controller common interface code from pmu_common.h to flcnif_cmn.h file. Interfaces are common for falcons irrespective of F/W on falcon controllers Jira NVGPU-19 Change-Id: Iad11b2fade8cf6716888773b2b1c23919cbcc07b Signed-off-by: Mahantesh Kumbar Reviewed-on: http://git-master/r/1296695 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/pmu_api.h | 4 +- drivers/gpu/nvgpu/gk20a/pmu_common.h | 135 --------------------------- drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | 17 +--- drivers/gpu/nvgpu/include/nvgpu/flcnif_cmn.h | 131 ++++++++++++++++++++++++++ drivers/gpu/nvgpu/pmuif/gpmuif_pmu.h | 2 +- drivers/gpu/nvgpu/pmuif/gpmuifboardobj.h | 2 +- drivers/gpu/nvgpu/pmuif/gpmuifclk.h | 4 +- drivers/gpu/nvgpu/pmuif/gpmuifpmgr.h | 4 +- drivers/gpu/nvgpu/pmuif/gpmuifseq.h | 4 +- drivers/gpu/nvgpu/pmuif/gpmuiftherm.h | 4 +- drivers/gpu/nvgpu/pmuif/gpmuifthermsensor.h | 4 +- drivers/gpu/nvgpu/pmuif/gpmuifvolt.h | 4 +- drivers/gpu/nvgpu/pmuif/nvgpu_gpmu_cmdif.h | 2 +- 13 files changed, 149 insertions(+), 168 deletions(-) delete mode 100644 drivers/gpu/nvgpu/gk20a/pmu_common.h create mode 100644 drivers/gpu/nvgpu/include/nvgpu/flcnif_cmn.h (limited to 'drivers/gpu/nvgpu') diff --git a/drivers/gpu/nvgpu/gk20a/pmu_api.h b/drivers/gpu/nvgpu/gk20a/pmu_api.h index def7bbea..d4af6bdb 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_api.h +++ b/drivers/gpu/nvgpu/gk20a/pmu_api.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011-2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -14,7 +14,7 @@ #ifndef __PMU_API_H__ #define __PMU_API_H__ -#include "pmu_common.h" +#include #include "pmuif/gpmuif_pg_rppg.h" /* PMU Command/Message Interfaces for Adaptive Power */ diff --git a/drivers/gpu/nvgpu/gk20a/pmu_common.h b/drivers/gpu/nvgpu/gk20a/pmu_common.h deleted file mode 100644 index 3b3362c1..00000000 --- a/drivers/gpu/nvgpu/gk20a/pmu_common.h +++ /dev/null @@ -1,135 +0,0 @@ -/* - * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef __PMU_COMMON_H__ -#define __PMU_COMMON_H__ - -#define PMU_CMD_SUBMIT_PAYLOAD_PARAMS_FB_SIZE_UNUSED 0 - -struct falc_u64 { - u32 lo; - u32 hi; -}; - -struct falc_dma_addr { - u32 dma_base; - /* - * dma_base1 is 9-bit MSB for FB Base - * address for the transfer in FB after - * address using 49b FB address - */ - u16 dma_base1; - u8 dma_offset; -}; - -struct pmu_mem_v0 { - u32 dma_base; - u8 dma_offset; - u8 dma_idx; -}; - -struct pmu_mem_v1 { - u32 dma_base; - u8 dma_offset; - u8 dma_idx; - u16 fb_size; -}; - -struct pmu_mem_v2 { - struct falc_dma_addr dma_addr; - u8 dma_idx; - u16 fb_size; -}; - -struct pmu_mem_desc_v0 { - /*! - * Start address of memory surface that is being communicated to the falcon. - */ - struct falc_u64 dma_addr; - /*! - * Max allowed DMA transfer size (size of the memory surface). Accesses past - * this point may result in page faults and/or memory corruptions. - */ - u16 dma_sizemax; - /*! - * DMA channel index to be used when accessing this surface. - */ - u8 dma_idx; -}; - -struct pmu_dmem { - u16 size; - u32 offset; -}; - -struct flcn_u64 { - u32 lo; - u32 hi; -}; - -#define nv_flcn_u64 flcn_u64 - -struct flcn_mem_desc_v0 { - struct flcn_u64 address; - u32 params; -}; - -#define nv_flcn_mem_desc flcn_mem_desc_v0 - -struct pmu_allocation_v0 { - u8 pad[3]; - u8 fb_mem_use; - struct { - struct pmu_dmem dmem; - struct pmu_mem_v0 fb; - } alloc; -}; - -struct pmu_allocation_v1 { - struct { - struct pmu_dmem dmem; - struct pmu_mem_v1 fb; - } alloc; -}; - -struct pmu_allocation_v2 { - struct { - struct pmu_dmem dmem; - struct pmu_mem_desc_v0 fb; - } alloc; -}; - -struct pmu_allocation_v3 { - struct { - struct pmu_dmem dmem; - struct flcn_mem_desc_v0 fb; - } alloc; -}; - -#define nv_pmu_allocation pmu_allocation_v3 - -struct pmu_hdr { - u8 unit_id; - u8 size; - u8 ctrl_flags; - u8 seq_id; -}; - -#define nv_pmu_hdr pmu_hdr -typedef u8 flcn_status; - -#define ALIGN_UP(v, gran) (((v) + ((gran) - 1)) & ~((gran)-1)) - -#define NV_UNSIGNED_ROUNDED_DIV(a, b) (((a) + ((b) / 2)) / (b)) - -#endif diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h index 84377d0b..dc23005e 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h @@ -23,7 +23,7 @@ #include #include "pmu_api.h" -#include "pmu_common.h" +#include #include "pmuif/nvgpu_gpmu_cmdif.h" /* defined by pmu hw spec */ @@ -124,21 +124,6 @@ struct pmu_ucode_desc_v1 { u32 compressed; }; -#define PMU_DMEM_ALLOC_ALIGNMENT (4) -#define PMU_DMEM_ALIGNMENT (4) - -#define PMU_CMD_FLAGS_PMU_MASK (0xF0) - -#define PMU_CMD_FLAGS_STATUS BIT(0) -#define PMU_CMD_FLAGS_INTR BIT(1) -#define PMU_CMD_FLAGS_EVENT BIT(2) -#define PMU_CMD_FLAGS_WATERMARK BIT(3) - -#define PMU_MSG_HDR_SIZE sizeof(struct pmu_hdr) -#define PMU_CMD_HDR_SIZE sizeof(struct pmu_hdr) - - - /***************************** ACR ERROR CODES ******************************/ /*! * Error codes used in PMU-ACR Task diff --git a/drivers/gpu/nvgpu/include/nvgpu/flcnif_cmn.h b/drivers/gpu/nvgpu/include/nvgpu/flcnif_cmn.h new file mode 100644 index 00000000..9d11e0ed --- /dev/null +++ b/drivers/gpu/nvgpu/include/nvgpu/flcnif_cmn.h @@ -0,0 +1,131 @@ +/* + * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __FLCNIFCMN_H__ +#define __FLCNIFCMN_H__ + +#define PMU_CMD_SUBMIT_PAYLOAD_PARAMS_FB_SIZE_UNUSED 0 + +struct falc_u64 { + u32 lo; + u32 hi; +}; + +struct falc_dma_addr { + u32 dma_base; + /* + * dma_base1 is 9-bit MSB for FB Base + * address for the transfer in FB after + * address using 49b FB address + */ + u16 dma_base1; + u8 dma_offset; +}; + +struct pmu_mem_v0 { + u32 dma_base; + u8 dma_offset; + u8 dma_idx; +}; + +struct pmu_mem_v1 { + u32 dma_base; + u8 dma_offset; + u8 dma_idx; + u16 fb_size; +}; + +struct pmu_mem_v2 { + struct falc_dma_addr dma_addr; + u8 dma_idx; + u16 fb_size; +}; + +struct pmu_mem_desc_v0 { + struct falc_u64 dma_addr; + u16 dma_sizemax; + u8 dma_idx; +}; + +struct pmu_dmem { + u16 size; + u32 offset; +}; + +struct flcn_mem_desc_v0 { + struct falc_u64 address; + u32 params; +}; + +#define nv_flcn_mem_desc flcn_mem_desc_v0 + +struct pmu_allocation_v0 { + u8 pad[3]; + u8 fb_mem_use; + struct { + struct pmu_dmem dmem; + struct pmu_mem_v0 fb; + } alloc; +}; + +struct pmu_allocation_v1 { + struct { + struct pmu_dmem dmem; + struct pmu_mem_v1 fb; + } alloc; +}; + +struct pmu_allocation_v2 { + struct { + struct pmu_dmem dmem; + struct pmu_mem_desc_v0 fb; + } alloc; +}; + +struct pmu_allocation_v3 { + struct { + struct pmu_dmem dmem; + struct flcn_mem_desc_v0 fb; + } alloc; +}; + +#define nv_pmu_allocation pmu_allocation_v3 + +struct pmu_hdr { + u8 unit_id; + u8 size; + u8 ctrl_flags; + u8 seq_id; +}; + +#define PMU_MSG_HDR_SIZE sizeof(struct pmu_hdr) +#define PMU_CMD_HDR_SIZE sizeof(struct pmu_hdr) + +#define nv_pmu_hdr pmu_hdr +typedef u8 flcn_status; + +#define PMU_DMEM_ALLOC_ALIGNMENT (4) +#define PMU_DMEM_ALIGNMENT (4) + +#define PMU_CMD_FLAGS_PMU_MASK (0xF0) + +#define PMU_CMD_FLAGS_STATUS BIT(0) +#define PMU_CMD_FLAGS_INTR BIT(1) +#define PMU_CMD_FLAGS_EVENT BIT(2) +#define PMU_CMD_FLAGS_WATERMARK BIT(3) + +#define ALIGN_UP(v, gran) (((v) + ((gran) - 1)) & ~((gran)-1)) + +#define NV_UNSIGNED_ROUNDED_DIV(a, b) (((a) + ((b) / 2)) / (b)) + +#endif /* _FLCNIFCMN_H_*/ diff --git a/drivers/gpu/nvgpu/pmuif/gpmuif_pmu.h b/drivers/gpu/nvgpu/pmuif/gpmuif_pmu.h index f9ffb4b1..6df92c1d 100644 --- a/drivers/gpu/nvgpu/pmuif/gpmuif_pmu.h +++ b/drivers/gpu/nvgpu/pmuif/gpmuif_pmu.h @@ -13,7 +13,7 @@ #ifndef _GPMUIFPMU_H_ #define _GPMUIFPMU_H_ -#include "gk20a/pmu_common.h" +#include #include "gpmuif_cmn.h" /* Make sure size of this structure is a multiple of 4 bytes */ diff --git a/drivers/gpu/nvgpu/pmuif/gpmuifboardobj.h b/drivers/gpu/nvgpu/pmuif/gpmuifboardobj.h index b3fc127f..8da31469 100644 --- a/drivers/gpu/nvgpu/pmuif/gpmuifboardobj.h +++ b/drivers/gpu/nvgpu/pmuif/gpmuifboardobj.h @@ -13,7 +13,7 @@ #ifndef _GPMUIFBOARDOBJ_H_ #define _GPMUIFBOARDOBJ_H_ -#include "gk20a/pmu_common.h" +#include #include "ctrl/ctrlboardobj.h" /* diff --git a/drivers/gpu/nvgpu/pmuif/gpmuifclk.h b/drivers/gpu/nvgpu/pmuif/gpmuifclk.h index 0af94eaa..5747b0df 100644 --- a/drivers/gpu/nvgpu/pmuif/gpmuifclk.h +++ b/drivers/gpu/nvgpu/pmuif/gpmuifclk.h @@ -1,5 +1,5 @@ /* -* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -20,7 +20,7 @@ #include "ctrl/ctrlclk.h" #include "pmuif/gpmuifboardobj.h" #include "pmuif/gpmuifvolt.h" -#include "gk20a/pmu_common.h" +#include enum nv_pmu_clk_clkwhich { clkwhich_mclk = 5, diff --git a/drivers/gpu/nvgpu/pmuif/gpmuifpmgr.h b/drivers/gpu/nvgpu/pmuif/gpmuifpmgr.h index 89cc27d1..08739902 100644 --- a/drivers/gpu/nvgpu/pmuif/gpmuifpmgr.h +++ b/drivers/gpu/nvgpu/pmuif/gpmuifpmgr.h @@ -1,5 +1,5 @@ /* -* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -17,7 +17,7 @@ #include "gk20a/pmu_common.h" #include "ctrl/ctrlpmgr.h" #include "pmuif/gpmuifboardobj.h" -#include "gk20a/pmu_common.h" +#include struct nv_pmu_pmgr_i2c_device_desc { struct nv_pmu_boardobj super; diff --git a/drivers/gpu/nvgpu/pmuif/gpmuifseq.h b/drivers/gpu/nvgpu/pmuif/gpmuifseq.h index 69d55490..2927206f 100644 --- a/drivers/gpu/nvgpu/pmuif/gpmuifseq.h +++ b/drivers/gpu/nvgpu/pmuif/gpmuifseq.h @@ -1,5 +1,5 @@ /* -* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -13,7 +13,7 @@ #ifndef _GPMUIFSEQ_H_ #define _GPMUIFSEQ_H_ -#include "gk20a/pmu_common.h" +#include #define PMU_UNIT_SEQ (0x02) diff --git a/drivers/gpu/nvgpu/pmuif/gpmuiftherm.h b/drivers/gpu/nvgpu/pmuif/gpmuiftherm.h index c87fe8a8..27e811ff 100644 --- a/drivers/gpu/nvgpu/pmuif/gpmuiftherm.h +++ b/drivers/gpu/nvgpu/pmuif/gpmuiftherm.h @@ -1,5 +1,5 @@ /* -* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -14,7 +14,7 @@ #ifndef _GPMUIFTHERM_H_ #define _GPMUIFTHERM_H_ -#include "gk20a/pmu_common.h" +#include #define NV_PMU_THERM_CMD_ID_RPC 0x00000002 #define NV_PMU_THERM_MSG_ID_RPC 0x00000002 diff --git a/drivers/gpu/nvgpu/pmuif/gpmuifthermsensor.h b/drivers/gpu/nvgpu/pmuif/gpmuifthermsensor.h index f0f1340e..bc2b4f52 100644 --- a/drivers/gpu/nvgpu/pmuif/gpmuifthermsensor.h +++ b/drivers/gpu/nvgpu/pmuif/gpmuifthermsensor.h @@ -1,5 +1,5 @@ /* -* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -16,7 +16,7 @@ #include "ctrl/ctrltherm.h" #include "pmuif/gpmuifboardobj.h" -#include "gk20a/pmu_common.h" +#include #define NV_PMU_THERM_BOARDOBJGRP_CLASS_ID_THERM_DEVICE 0x00 #define NV_PMU_THERM_BOARDOBJGRP_CLASS_ID_THERM_CHANNEL 0x01 diff --git a/drivers/gpu/nvgpu/pmuif/gpmuifvolt.h b/drivers/gpu/nvgpu/pmuif/gpmuifvolt.h index 359b3a7a..b4dea724 100644 --- a/drivers/gpu/nvgpu/pmuif/gpmuifvolt.h +++ b/drivers/gpu/nvgpu/pmuif/gpmuifvolt.h @@ -1,5 +1,5 @@ /* -* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. +* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -14,7 +14,7 @@ #define _GPMUIFVOLT_H_ #include "pmuif/gpmuifboardobj.h" -#include "gk20a/pmu_common.h" +#include #include "ctrl/ctrlvolt.h" #define NV_PMU_VOLT_VALUE_0V_IN_UV (0) diff --git a/drivers/gpu/nvgpu/pmuif/nvgpu_gpmu_cmdif.h b/drivers/gpu/nvgpu/pmuif/nvgpu_gpmu_cmdif.h index b21b3981..3724be2f 100644 --- a/drivers/gpu/nvgpu/pmuif/nvgpu_gpmu_cmdif.h +++ b/drivers/gpu/nvgpu/pmuif/nvgpu_gpmu_cmdif.h @@ -14,7 +14,7 @@ #define _NVGPUGPMUCMDIF_H_ #include "gk20a/pmu_api.h" -#include "gk20a/pmu_common.h" +#include #include "gpmuif_cmn.h" #include "gpmuif_pmu.h" #include "gpmuifboardobj.h" -- cgit v1.2.2