From 7ff4a760a83aaff0c214a5564530a0f32de40a84 Mon Sep 17 00:00:00 2001 From: Shardar Shariff Md Date: Fri, 9 Sep 2016 02:19:44 +0530 Subject: gpu: nvgpu: change the usage of tegra_fuse_readl tegra_fuse_readl() prototype is changed to match upstreamed fuse driver, so change implementation accordingly. Bug 200233653 Change-Id: I01f23cfafd5923d86ac48e67b36132ce690e962b Signed-off-by: Shardar Shariff Md Reviewed-on: http://git-master/r/1217374 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Deepak Nibade Reviewed-by: Bharat Nihalani --- drivers/gpu/nvgpu/gm20b/hal_gm20b.c | 9 +++++---- drivers/gpu/nvgpu/gm20b/pmu_gm20b.c | 5 ++++- 2 files changed, 9 insertions(+), 5 deletions(-) (limited to 'drivers/gpu/nvgpu') diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index e30ca96f..5133fb35 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c @@ -180,6 +180,7 @@ int gm20b_init_hal(struct gk20a *g) struct gpu_ops *gops = &g->ops; struct nvgpu_gpu_characteristics *c = &g->gpu_characteristics; struct gk20a_platform *platform = dev_get_drvdata(g->dev); + u32 val; *gops = gm20b_ops; gops->securegpccs = false; @@ -187,8 +188,8 @@ int gm20b_init_hal(struct gk20a *g) if (platform->is_fmodel) { gops->privsecurity = 1; } else { - if (tegra_fuse_readl(FUSE_OPT_PRIV_SEC_DIS_0) & - PRIV_SECURITY_DISABLE) { + tegra_fuse_readl(FUSE_OPT_PRIV_SEC_DIS_0, &val); + if (val & PRIV_SECURITY_DISABLE) { gk20a_dbg_info("priv security is disabled in HW"); gops->privsecurity = 0; } else { @@ -200,8 +201,8 @@ int gm20b_init_hal(struct gk20a *g) gk20a_dbg_info("running ASIM with PRIV security disabled"); gops->privsecurity = 0; } else { - if (tegra_fuse_readl(FUSE_OPT_PRIV_SEC_DIS_0) & - PRIV_SECURITY_DISABLE) { + tegra_fuse_readl(FUSE_OPT_PRIV_SEC_DIS_0, &val); + if (val & PRIV_SECURITY_DISABLE) { gops->privsecurity = 0; } else { gk20a_dbg_info("priv security is not supported but enabled"); diff --git a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c index 30e8fa67..5c5a889a 100644 --- a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c @@ -256,12 +256,15 @@ void gm20b_write_dmatrfbase(struct gk20a *g, u32 addr) /*Dump Security related fuses*/ static void pmu_dump_security_fuses_gm20b(struct gk20a *g) { + u32 val; + gk20a_err(dev_from_gk20a(g), "FUSE_OPT_SEC_DEBUG_EN_0 : 0x%x", gk20a_readl(g, fuse_opt_sec_debug_en_r())); gk20a_err(dev_from_gk20a(g), "FUSE_OPT_PRIV_SEC_EN_0 : 0x%x", gk20a_readl(g, fuse_opt_priv_sec_en_r())); + tegra_fuse_readl(FUSE_GCPLEX_CONFIG_FUSE_0, &val); gk20a_err(dev_from_gk20a(g), "FUSE_GCPLEX_CONFIG_FUSE_0 : 0x%x", - tegra_fuse_readl(FUSE_GCPLEX_CONFIG_FUSE_0)); + val); } void gm20b_init_pmu_ops(struct gpu_ops *gops) -- cgit v1.2.2