From 6114553413297dbcae637bc50ef2ff2a6c0858d1 Mon Sep 17 00:00:00 2001 From: David Nieto Date: Thu, 19 Oct 2017 10:12:24 -0700 Subject: gpu: nvgpu: gv100: fix timeout handling GV100 has a larger vidmem size and a slower sideband to sysmem so timeouts need to be adjusted to avoid false positives. JIRA: NVGPUGV100-36 Change-Id: I3cbc19aa1158c89bc48ae1fa6ec4bc755cd9389d Signed-off-by: David Nieto Reviewed-on: https://git-master.nvidia.com/r/1582092 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv100/fifo_gv100.c | 8 ++++++++ drivers/gpu/nvgpu/gv100/fifo_gv100.h | 1 + drivers/gpu/nvgpu/gv100/hal_gv100.c | 6 ++++-- drivers/gpu/nvgpu/gv100/mm_gv100.c | 13 +++++++++++++ drivers/gpu/nvgpu/gv100/mm_gv100.h | 1 + drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | 11 ++++++++--- drivers/gpu/nvgpu/gv11b/fifo_gv11b.h | 2 +- drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 1 + 8 files changed, 37 insertions(+), 6 deletions(-) (limited to 'drivers/gpu/nvgpu') diff --git a/drivers/gpu/nvgpu/gv100/fifo_gv100.c b/drivers/gpu/nvgpu/gv100/fifo_gv100.c index e19301e6..79862f6b 100644 --- a/drivers/gpu/nvgpu/gv100/fifo_gv100.c +++ b/drivers/gpu/nvgpu/gv100/fifo_gv100.c @@ -26,7 +26,15 @@ #include +#define DEFAULT_FIFO_PREEMPT_TIMEOUT 0x3FFFFFUL + u32 gv100_fifo_get_num_fifos(struct gk20a *g) { return ccsr_channel__size_1_v(); } + +u32 gv100_fifo_get_preempt_timeout(struct gk20a *g) +{ + return DEFAULT_FIFO_PREEMPT_TIMEOUT; +} + diff --git a/drivers/gpu/nvgpu/gv100/fifo_gv100.h b/drivers/gpu/nvgpu/gv100/fifo_gv100.h index 3ffb417c..af6ad030 100644 --- a/drivers/gpu/nvgpu/gv100/fifo_gv100.h +++ b/drivers/gpu/nvgpu/gv100/fifo_gv100.h @@ -29,4 +29,5 @@ struct gk20a; u32 gv100_fifo_get_num_fifos(struct gk20a *g); +u32 gv100_fifo_get_preempt_timeout(struct gk20a *g); #endif diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index 4e05f22b..ff852168 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c @@ -424,6 +424,7 @@ static const struct gpu_ops gv100_ops = { .mem_unlock = gv100_fb_memory_unlock, }, .fifo = { + .get_preempt_timeout = gv100_fifo_get_preempt_timeout, .init_fifo_setup_hw = gv11b_init_fifo_setup_hw, .bind_channel = channel_gm20b_bind, .unbind_channel = channel_gv11b_unbind, @@ -470,7 +471,7 @@ static const struct gpu_ops gv100_ops = { .intr_0_error_mask = gv11b_fifo_intr_0_error_mask, .is_preempt_pending = gv11b_fifo_is_preempt_pending, .init_pbdma_intr_descs = gv11b_fifo_init_pbdma_intr_descs, - .reset_enable_hw = gv11b_init_fifo_reset_enable_hw, + .reset_enable_hw = gk20a_init_fifo_reset_enable_hw, .teardown_ch_tsg = gv11b_fifo_teardown_ch_tsg, .handle_sched_error = gv11b_fifo_handle_sched_error, .handle_pbdma_intr_0 = gv11b_fifo_handle_pbdma_intr_0, @@ -523,7 +524,7 @@ static const struct gpu_ops gv100_ops = { .vm_bind_channel = gk20a_vm_bind_channel, .fb_flush = gk20a_mm_fb_flush, .l2_invalidate = gk20a_mm_l2_invalidate, - .l2_flush = gv11b_mm_l2_flush, + .l2_flush = gk20a_mm_l2_flush, .cbc_clean = gk20a_mm_cbc_clean, .set_big_page_size = gm20b_mm_set_big_page_size, .get_big_page_sizes = gm20b_mm_get_big_page_sizes, @@ -542,6 +543,7 @@ static const struct gpu_ops gv100_ops = { .init_bar2_mm_hw_setup = gv11b_init_bar2_mm_hw_setup, .remove_bar2_vm = gv11b_mm_remove_bar2_vm, .fault_info_mem_destroy = gv11b_mm_fault_info_mem_destroy, + .get_flush_retries = gv100_mm_get_flush_retries, }, .pramin = { .enter = gk20a_pramin_enter, diff --git a/drivers/gpu/nvgpu/gv100/mm_gv100.c b/drivers/gpu/nvgpu/gv100/mm_gv100.c index 93688206..1b46faae 100644 --- a/drivers/gpu/nvgpu/gv100/mm_gv100.c +++ b/drivers/gpu/nvgpu/gv100/mm_gv100.c @@ -40,3 +40,16 @@ size_t gv100_mm_get_vidmem_size(struct gk20a *g) return bytes; } + +u32 gv100_mm_get_flush_retries(struct gk20a *g, enum nvgpu_flush_op op) +{ + switch (op) { + /* GV100 has a large FB so it needs larger timeouts */ + case NVGPU_FLUSH_FB: + return 2000; + case NVGPU_FLUSH_L2_FLUSH: + return 2000; + default: + return 200; /* Default retry timer */ + } +} diff --git a/drivers/gpu/nvgpu/gv100/mm_gv100.h b/drivers/gpu/nvgpu/gv100/mm_gv100.h index eba724f9..ea896503 100644 --- a/drivers/gpu/nvgpu/gv100/mm_gv100.h +++ b/drivers/gpu/nvgpu/gv100/mm_gv100.h @@ -28,5 +28,6 @@ struct gk20a; size_t gv100_mm_get_vidmem_size(struct gk20a *g); +u32 gv100_mm_get_flush_retries(struct gk20a *g, enum nvgpu_flush_op op); #endif diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c index 7bb3d654..4a03e6d9 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c @@ -372,6 +372,11 @@ u32 gv11b_fifo_intr_0_error_mask(struct gk20a *g) return intr_0_error_mask; } +u32 gv11b_fifo_get_preempt_timeout(struct gk20a *g) +{ + return gk20a_get_gr_idle_timeout(g); +} + static int gv11b_fifo_poll_pbdma_chan_status(struct gk20a *g, u32 id, u32 pbdma_id, unsigned int timeout_rc_type) { @@ -405,7 +410,7 @@ static int gv11b_fifo_poll_pbdma_chan_status(struct gk20a *g, u32 id, gk20a_writel(g, pbdma_intr_1_r(pbdma_id), pbdma_intr_1); } - nvgpu_timeout_init(g, &timeout, gk20a_get_gr_idle_timeout(g), + nvgpu_timeout_init(g, &timeout, g->ops.fifo.get_preempt_timeout(g), NVGPU_TIMER_CPU_TIMER); /* Verify that ch/tsg is no longer on the pbdma */ @@ -465,7 +470,7 @@ static int gv11b_fifo_poll_eng_ctx_status(struct gk20a *g, u32 id, u32 ctx_stat; int ret = -EBUSY; - nvgpu_timeout_init(g, &timeout, gk20a_get_gr_idle_timeout(g), + nvgpu_timeout_init(g, &timeout, g->ops.fifo.get_preempt_timeout(g), NVGPU_TIMER_CPU_TIMER); /* Check if ch/tsg has saved off the engine or if ctxsw is hung */ @@ -686,7 +691,7 @@ static int gv11b_fifo_poll_runlist_preempt_pending(struct gk20a *g, u32 delay = GR_IDLE_CHECK_DEFAULT; int ret = -EBUSY; - nvgpu_timeout_init(g, &timeout, gk20a_get_gr_idle_timeout(g), + nvgpu_timeout_init(g, &timeout, g->ops.fifo.get_preempt_timeout(g), NVGPU_TIMER_CPU_TIMER); do { if (!((gk20a_readl(g, fifo_runlist_preempt_r())) & diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h index f622aba8..fc1ddf83 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h @@ -113,5 +113,5 @@ u32 gv11b_fifo_get_syncpt_incr_cmd_size(bool wfi_cmd); int gv11b_init_fifo_setup_hw(struct gk20a *g); void gv11b_fifo_tsg_verify_status_faulted(struct channel_gk20a *ch); - +u32 gv11b_fifo_get_preempt_timeout(struct gk20a *g); #endif diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 729727c9..5b10b7d2 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c @@ -438,6 +438,7 @@ static const struct gpu_ops gv11b_ops = { gr_gv11b_pg_gr_load_gating_prod, }, .fifo = { + .get_preempt_timeout = gv11b_fifo_get_preempt_timeout, .init_fifo_setup_hw = gv11b_init_fifo_setup_hw, .bind_channel = channel_gm20b_bind, .unbind_channel = channel_gv11b_unbind, -- cgit v1.2.2