From 5cb995c7510e0290956a3aa221c6a77d4020b3ff Mon Sep 17 00:00:00 2001 From: Ashutosh Jain Date: Wed, 20 Jan 2016 20:06:23 +0530 Subject: gpu: nvgpu: Fix wait for sm lock down. global_esr and warp_esr are edge-triggered and are cleared in kernel isr so skip checking them when wait_for_pause is called from UMD via ioctl. Bug 1619430 Change-Id: I2ae54f23ba5c8bfaab35a476f88ccca0bbb10202 Signed-off-by: Ashutosh Jain Reviewed-on: http://git-master/r/935808 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Cory Perry Tested-by: Cory Perry GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c | 4 ++-- drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 7 ++++--- drivers/gpu/nvgpu/gk20a/gr_gk20a.h | 3 ++- 3 files changed, 8 insertions(+), 6 deletions(-) (limited to 'drivers/gpu/nvgpu') diff --git a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c index 536f00e0..9ed5fef3 100644 --- a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011-2015, NVIDIA Corporation. All rights reserved. + * Copyright (c) 2011-2016, NVIDIA Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -397,7 +397,7 @@ static int nvgpu_gpu_ioctl_wait_for_pause(struct gk20a *g, gpc = g->gr.sm_to_cluster[sm_id].gpc_index; tpc = g->gr.sm_to_cluster[sm_id].tpc_index; - err = gk20a_gr_lock_down_sm(g, gpc, tpc, global_mask); + err = gk20a_gr_lock_down_sm(g, gpc, tpc, global_mask, false); if (err) { gk20a_err(dev_from_gk20a(g), "sm did not lock down!\n"); diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index bf7a3fa7..6e2ea548 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c @@ -5187,7 +5187,8 @@ unlock: } int gk20a_gr_lock_down_sm(struct gk20a *g, - u32 gpc, u32 tpc, u32 global_esr_mask) + u32 gpc, u32 tpc, u32 global_esr_mask, + bool check_errors) { u32 offset = proj_gpc_stride_v() * gpc + proj_tpc_in_gpc_stride_v() * tpc; @@ -5204,7 +5205,7 @@ int gk20a_gr_lock_down_sm(struct gk20a *g, gr_gpc0_tpc0_sm_dbgr_control0_r() + offset, dbgr_control0); return gk20a_gr_wait_for_sm_lock_down(g, gpc, tpc, global_esr_mask, - true); + check_errors); } bool gk20a_gr_sm_debugger_attached(struct gk20a *g) @@ -5306,7 +5307,7 @@ static int gk20a_gr_handle_sm_exception(struct gk20a *g, u32 gpc, u32 tpc, } if (do_warp_sync) { - ret = gk20a_gr_lock_down_sm(g, gpc, tpc, global_mask); + ret = gk20a_gr_lock_down_sm(g, gpc, tpc, global_mask, true); if (ret) { gk20a_err(dev_from_gk20a(g), "sm did not lock down!\n"); return ret; diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h index c58daefa..ad197228 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h @@ -517,7 +517,8 @@ void gk20a_suspend_single_sm(struct gk20a *g, void gk20a_suspend_all_sms(struct gk20a *g, u32 global_esr_mask, bool check_errors); int gk20a_gr_lock_down_sm(struct gk20a *g, - u32 gpc, u32 tpc, u32 global_esr_mask); + u32 gpc, u32 tpc, u32 global_esr_mask, + bool check_errors); int gr_gk20a_set_sm_debug_mode(struct gk20a *g, struct channel_gk20a *ch, u64 sms, bool enable); bool gk20a_is_channel_ctx_resident(struct channel_gk20a *ch); -- cgit v1.2.2