From 45355f00e7de9068f403682044f550026fa7e86e Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Mon, 12 Jun 2017 14:21:12 -0700 Subject: gpu: nvgpu: use hww_esr_reset field to reset hwww_esr Use hww_esr_reset field to clear hww errors Change-Id: I4b5da20c8a4bcfe2dea357d3d2ebd53678673b48 Signed-off-by: Seema Khowala Reviewed-on: http://git-master/r/1500965 Reviewed-by: svccoveritychecker GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'drivers/gpu/nvgpu') diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 0fd27598..f56702dc 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c @@ -6558,14 +6558,16 @@ int gk20a_gr_isr(struct gk20a *g) if (exception & gr_exception_fe_m()) { u32 fe = gk20a_readl(g, gr_fe_hww_esr_r()); nvgpu_err(g, "fe warning %08x", fe); - gk20a_writel(g, gr_fe_hww_esr_r(), fe); + gk20a_writel(g, gr_fe_hww_esr_r(), + gr_fe_hww_esr_reset_active_f()); need_reset |= -EFAULT; } if (exception & gr_exception_memfmt_m()) { u32 memfmt = gk20a_readl(g, gr_memfmt_hww_esr_r()); nvgpu_err(g, "memfmt exception %08x", memfmt); - gk20a_writel(g, gr_memfmt_hww_esr_r(), memfmt); + gk20a_writel(g, gr_memfmt_hww_esr_r(), + gr_memfmt_hww_esr_reset_active_f()); need_reset |= -EFAULT; } @@ -6594,7 +6596,8 @@ int gk20a_gr_isr(struct gk20a *g) if (exception & gr_exception_ds_m()) { u32 ds = gk20a_readl(g, gr_ds_hww_esr_r()); nvgpu_err(g, "ds exception %08x", ds); - gk20a_writel(g, gr_ds_hww_esr_r(), ds); + gk20a_writel(g, gr_ds_hww_esr_r(), + gr_ds_hww_esr_reset_task_f()); need_reset |= -EFAULT; } -- cgit v1.2.2