From 3b1ab45ccc40683c4b51dd9022c3aeed2e7666ba Mon Sep 17 00:00:00 2001 From: Mahantesh Kumbar Date: Tue, 4 Jul 2017 11:54:27 +0530 Subject: gpu: nvgpu: replace gk20a_dbg_* with nvgpu_dbg_* -replace gk20a_dbg_* statements with nvgpu_dbg_* for PMU in drivers/gpu/nvgpu/common/pmu folder JIRA NVGPU-93 Change-Id: Id616d1f5cb5ce4007bc9543f05e57e4631cdd691 Signed-off-by: Mahantesh Kumbar Reviewed-on: https://git-master/r/1512925 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu --- drivers/gpu/nvgpu/common/pmu/pmu_ipc.c | 21 +++++++++++---------- drivers/gpu/nvgpu/common/pmu/pmu_pg.c | 4 ++-- 2 files changed, 13 insertions(+), 12 deletions(-) (limited to 'drivers/gpu/nvgpu') diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c b/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c index dcf6db9c..352e525f 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c @@ -221,8 +221,9 @@ static bool pmu_queue_has_room(struct nvgpu_pmu *pmu, static int pmu_queue_push(struct nvgpu_pmu *pmu, struct pmu_queue *queue, void *data, u32 size) { + struct gk20a *g = pmu->g; - gk20a_dbg_fn(""); + nvgpu_log_fn(g, " "); if (!queue->opened && queue->oflag == OFLAG_WRITE) { nvgpu_err(gk20a_from_pmu(pmu), "queue not opened for write"); @@ -276,7 +277,7 @@ static void pmu_queue_rewind(struct nvgpu_pmu *pmu, struct gk20a *g = gk20a_from_pmu(pmu); struct pmu_cmd cmd; - gk20a_dbg_fn(""); + nvgpu_log_fn(g, " "); if (!queue->opened) { nvgpu_err(gk20a_from_pmu(pmu), "queue not opened"); @@ -448,7 +449,7 @@ static int pmu_write_cmd(struct nvgpu_pmu *pmu, struct pmu_cmd *cmd, struct nvgpu_timeout timeout; int err; - gk20a_dbg_fn(""); + nvgpu_log_fn(g, " "); queue = &pmu->queue[queue_id]; nvgpu_timeout_init(g, &timeout, (int)timeout_ms, NVGPU_TIMER_CPU_TIMER); @@ -473,7 +474,7 @@ clean_up: if (err) nvgpu_err(g, "fail to write cmd to queue %d", queue_id); else - gk20a_dbg_fn("done"); + nvgpu_log_fn(g, "done"); return err; } @@ -489,7 +490,7 @@ int nvgpu_pmu_cmd_post(struct gk20a *g, struct pmu_cmd *cmd, void *in = NULL, *out = NULL; int err; - gk20a_dbg_fn(""); + nvgpu_log_fn(g, " "); if ((!cmd) || (!seq_desc) || (!pmu->pmu_ready)) { if (!cmd) @@ -625,12 +626,12 @@ int nvgpu_pmu_cmd_post(struct gk20a *g, struct pmu_cmd *cmd, if (err) seq->state = PMU_SEQ_STATE_PENDING; - gk20a_dbg_fn("done"); + nvgpu_log_fn(g, "done"); return 0; clean_up: - gk20a_dbg_fn("fail"); + nvgpu_log_fn(g, "fail"); if (in) nvgpu_free(&pmu->dmem, pv->pmu_allocation_get_dmem_offset(pmu, in)); @@ -650,7 +651,7 @@ static int pmu_response_handle(struct nvgpu_pmu *pmu, struct pmu_v *pv = &g->ops.pmu_ver; int ret = 0; - gk20a_dbg_fn(""); + nvgpu_log_fn(g, " "); seq = &pmu->seq[msg->hdr.seq_id]; if (seq->state != PMU_SEQ_STATE_USED && @@ -724,7 +725,7 @@ static int pmu_response_handle(struct nvgpu_pmu *pmu, /* TBD: notify client waiting for available dmem */ - gk20a_dbg_fn("done"); + nvgpu_log_fn(g, "done"); return 0; } @@ -734,7 +735,7 @@ static int pmu_handle_event(struct nvgpu_pmu *pmu, struct pmu_msg *msg) int err = 0; struct gk20a *g = gk20a_from_pmu(pmu); - gk20a_dbg_fn(""); + nvgpu_log_fn(g, " "); switch (msg->hdr.unit_id) { case PMU_UNIT_PERFMON: case PMU_UNIT_PERFMON_T18X: diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_pg.c b/drivers/gpu/nvgpu/common/pmu/pmu_pg.c index 06dab8ea..3cdeedcc 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu_pg.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu_pg.c @@ -229,7 +229,7 @@ int nvgpu_pmu_disable_elpg(struct gk20a *g) u32 pg_engine_id_list = 0; u32 *ptr = NULL; - gk20a_dbg_fn(""); + nvgpu_log_fn(g, " "); if (g->ops.pmu.pmu_pg_supported_engines_list) pg_engine_id_list = g->ops.pmu.pmu_pg_supported_engines_list(g); @@ -483,7 +483,7 @@ int nvgpu_pmu_init_bind_fecs(struct gk20a *g) int err = 0; u32 gr_engine_id; - gk20a_dbg_fn(""); + nvgpu_log_fn(g, " "); gr_engine_id = gk20a_fifo_get_gr_engine_id(g); -- cgit v1.2.2