From 2cc03def6a6427acdebd8a6053b1309280e5fe9b Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Tue, 28 Feb 2017 12:12:38 -0800 Subject: gpu: nvgpu: gv11b: update headers generate headers for pri ring, pbdma intr and gmmu with updated reg generator JIRA GV11B-47 JIRA GV11B-7 Change-Id: Id198fb338c03acc52c523754cfd07db01ff9bffd Signed-off-by: Seema Khowala Reviewed-on: http://git-master/r/1312756 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- .../gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h | 30 ++++++++- .../nvgpu/include/nvgpu/hw/gv11b/hw_fifo_gv11b.h | 18 ++---- .../nvgpu/include/nvgpu/hw/gv11b/hw_gmmu_gv11b.h | 22 ++++++- .../nvgpu/include/nvgpu/hw/gv11b/hw_pbdma_gv11b.h | 12 ++++ .../nvgpu/hw/gv11b/hw_pri_ringmaster_gv11b.h | 18 +++++- .../nvgpu/hw/gv11b/hw_pri_ringstation_gpc_gv11b.h | 73 ++++++++++++++++++++++ .../nvgpu/hw/gv11b/hw_pri_ringstation_sys_gv11b.h | 18 +++++- 7 files changed, 174 insertions(+), 17 deletions(-) create mode 100644 drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pri_ringstation_gpc_gv11b.h (limited to 'drivers/gpu/nvgpu') diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h index d2f22afa..45cb0ad5 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -826,6 +826,10 @@ static inline u32 fb_mmu_fault_buffer_get_ptr_f(u32 v) { return (v & 0xfffff) << 0; } +static inline u32 fb_mmu_fault_buffer_get_ptr_m(void) +{ + return 0xfffff << 0; +} static inline u32 fb_mmu_fault_buffer_get_ptr_v(u32 r) { return (r >> 0) & 0xfffff; @@ -1330,6 +1334,10 @@ static inline u32 fb_mmu_fault_status_replayable_set_f(void) { return 0x100; } +static inline u32 fb_mmu_fault_status_replayable_reset_f(void) +{ + return 0x0; +} static inline u32 fb_mmu_fault_status_non_replayable_f(u32 v) { return (v & 0x1) << 9; @@ -1346,6 +1354,10 @@ static inline u32 fb_mmu_fault_status_non_replayable_set_f(void) { return 0x200; } +static inline u32 fb_mmu_fault_status_non_replayable_reset_f(void) +{ + return 0x0; +} static inline u32 fb_mmu_fault_status_replayable_error_f(u32 v) { return (v & 0x1) << 10; @@ -1362,6 +1374,10 @@ static inline u32 fb_mmu_fault_status_replayable_error_set_f(void) { return 0x400; } +static inline u32 fb_mmu_fault_status_replayable_error_reset_f(void) +{ + return 0x0; +} static inline u32 fb_mmu_fault_status_non_replayable_error_f(u32 v) { return (v & 0x1) << 11; @@ -1378,6 +1394,10 @@ static inline u32 fb_mmu_fault_status_non_replayable_error_set_f(void) { return 0x800; } +static inline u32 fb_mmu_fault_status_non_replayable_error_reset_f(void) +{ + return 0x0; +} static inline u32 fb_mmu_fault_status_replayable_overflow_f(u32 v) { return (v & 0x1) << 12; @@ -1394,6 +1414,10 @@ static inline u32 fb_mmu_fault_status_replayable_overflow_set_f(void) { return 0x1000; } +static inline u32 fb_mmu_fault_status_replayable_overflow_reset_f(void) +{ + return 0x0; +} static inline u32 fb_mmu_fault_status_non_replayable_overflow_f(u32 v) { return (v & 0x1) << 13; @@ -1410,6 +1434,10 @@ static inline u32 fb_mmu_fault_status_non_replayable_overflow_set_f(void) { return 0x2000; } +static inline u32 fb_mmu_fault_status_non_replayable_overflow_reset_f(void) +{ + return 0x0; +} static inline u32 fb_mmu_fault_status_replayable_getptr_corrupted_f(u32 v) { return (v & 0x1) << 14; diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fifo_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fifo_gv11b.h index d68c823a..911efa43 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fifo_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fifo_gv11b.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -266,14 +266,6 @@ static inline u32 fifo_intr_chsw_error_r(void) { return 0x0000256c; } -static inline u32 fifo_gpc_v(void) -{ - return 0x00000000; -} -static inline u32 fifo_hub_v(void) -{ - return 0x00000001; -} static inline u32 fifo_intr_pbdma_id_r(void) { return 0x000025a0; @@ -306,10 +298,6 @@ static inline u32 fifo_fb_timeout_period_max_f(void) { return 0x3fffffff; } -static inline u32 fifo_error_sched_disable_r(void) -{ - return 0x0000262c; -} static inline u32 fifo_sched_disable_r(void) { return 0x00002630; @@ -406,6 +394,10 @@ static inline u32 fifo_engine_status_next_id_type_chid_v(void) { return 0x00000000; } +static inline u32 fifo_engine_status_eng_reload_v(u32 r) +{ + return (r >> 29) & 0x1; +} static inline u32 fifo_engine_status_faulted_v(u32 r) { return (r >> 30) & 0x1; diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gmmu_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gmmu_gv11b.h index 1c523f87..dc8473a5 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gmmu_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gmmu_gv11b.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -1274,6 +1274,26 @@ static inline u32 gmmu_pte_kind_s8_2s_v(void) { return 0x0000002b; } +static inline u32 gmmu_fault_client_type_gpc_v(void) +{ + return 0x00000000; +} +static inline u32 gmmu_fault_client_type_hub_v(void) +{ + return 0x00000001; +} +static inline u32 gmmu_fault_type_unbound_inst_block_v(void) +{ + return 0x00000004; +} +static inline u32 gmmu_fault_mmu_eng_id_bar2_v(void) +{ + return 0x00000005; +} +static inline u32 gmmu_fault_mmu_eng_id_physical_v(void) +{ + return 0x0000001f; +} static inline u32 gmmu_fault_buf_size_v(void) { return 0x00000020; diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pbdma_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pbdma_gv11b.h index 7aea3870..9c2ba7c6 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pbdma_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pbdma_gv11b.h @@ -454,6 +454,10 @@ static inline u32 pbdma_intr_0_pbcrc_pending_f(void) { return 0x80000; } +static inline u32 pbdma_intr_0_clear_faulted_error_pending_f(void) +{ + return 0x100000; +} static inline u32 pbdma_intr_0_method_pending_f(void) { return 0x200000; @@ -466,6 +470,10 @@ static inline u32 pbdma_intr_0_device_pending_f(void) { return 0x800000; } +static inline u32 pbdma_intr_0_eng_reset_pending_f(void) +{ + return 0x1000000; +} static inline u32 pbdma_intr_0_semaphore_pending_f(void) { return 0x2000000; @@ -514,6 +522,10 @@ static inline u32 pbdma_intr_stall_lbreq_enabled_f(void) { return 0x100; } +static inline u32 pbdma_intr_stall_1_r(u32 i) +{ + return 0x00040140 + i*8192; +} static inline u32 pbdma_udma_nop_r(void) { return 0x00000008; diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pri_ringmaster_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pri_ringmaster_gv11b.h index 835366c1..ce9e53ee 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pri_ringmaster_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pri_ringmaster_gv11b.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -102,6 +102,22 @@ static inline u32 pri_ringmaster_intr_status0_r(void) { return 0x00120058; } +static inline u32 pri_ringmaster_intr_status0_ring_start_conn_fault_v(u32 r) +{ + return (r >> 0) & 0x1; +} +static inline u32 pri_ringmaster_intr_status0_disconnect_fault_v(u32 r) +{ + return (r >> 1) & 0x1; +} +static inline u32 pri_ringmaster_intr_status0_overflow_fault_v(u32 r) +{ + return (r >> 2) & 0x1; +} +static inline u32 pri_ringmaster_intr_status0_gbl_write_error_sys_v(u32 r) +{ + return (r >> 8) & 0x1; +} static inline u32 pri_ringmaster_intr_status1_r(void) { return 0x0012005c; diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pri_ringstation_gpc_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pri_ringstation_gpc_gv11b.h new file mode 100644 index 00000000..89abfa3c --- /dev/null +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pri_ringstation_gpc_gv11b.h @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +/* + * Function naming determines intended use: + * + * _r(void) : Returns the offset for register . + * + * _o(void) : Returns the offset for element . + * + * _w(void) : Returns the word offset for word (4 byte) element . + * + * __s(void) : Returns size of field of register in bits. + * + * __f(u32 v) : Returns a value based on 'v' which has been shifted + * and masked to place it at field of register . This value + * can be |'d with others to produce a full register value for + * register . + * + * __m(void) : Returns a mask for field of register . This + * value can be ~'d and then &'d to clear the value of field for + * register . + * + * ___f(void) : Returns the constant value after being shifted + * to place it at field of register . This value can be |'d + * with others to produce a full register value for . + * + * __v(u32 r) : Returns the value of field from a full register + * value 'r' after being shifted to place its LSB at bit 0. + * This value is suitable for direct comparison with other unshifted + * values appropriate for use in field of register . + * + * ___v(void) : Returns the constant value for defined for + * field of register . This value is suitable for direct + * comparison with unshifted values appropriate for use in field + * of register . + */ +#ifndef _hw_pri_ringstation_gpc_gv11b_h_ +#define _hw_pri_ringstation_gpc_gv11b_h_ + +static inline u32 pri_ringstation_gpc_master_config_r(u32 i) +{ + return 0x00128300 + i*4; +} +static inline u32 pri_ringstation_gpc_gpc0_priv_error_adr_r(void) +{ + return 0x00128120; +} +static inline u32 pri_ringstation_gpc_gpc0_priv_error_wrdat_r(void) +{ + return 0x00128124; +} +static inline u32 pri_ringstation_gpc_gpc0_priv_error_info_r(void) +{ + return 0x00128128; +} +static inline u32 pri_ringstation_gpc_gpc0_priv_error_code_r(void) +{ + return 0x0012812c; +} +#endif diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pri_ringstation_sys_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pri_ringstation_sys_gv11b.h index e192bd13..ae6ad795 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pri_ringstation_sys_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pri_ringstation_sys_gv11b.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -66,4 +66,20 @@ static inline u32 pri_ringstation_sys_decode_config_ring_drop_on_ring_not_starte { return 0x1; } +static inline u32 pri_ringstation_sys_priv_error_adr_r(void) +{ + return 0x00122120; +} +static inline u32 pri_ringstation_sys_priv_error_wrdat_r(void) +{ + return 0x00122124; +} +static inline u32 pri_ringstation_sys_priv_error_info_r(void) +{ + return 0x00122128; +} +static inline u32 pri_ringstation_sys_priv_error_code_r(void) +{ + return 0x0012212c; +} #endif -- cgit v1.2.2