From 0d63e22a9920eb1e3d8653665cda650eca2311cd Mon Sep 17 00:00:00 2001 From: seshendra Gadagottu Date: Wed, 27 Sep 2017 11:18:13 -0700 Subject: gpu: nvgpu: gv11b: check for memory aperture type Check for memory aperture type before setting relevant sysmem non-coherent or vidmem flags in ram entry. Modified following functions to correct memory aperture type: gv11b_get_ch_runlist_entry gv11b_subctx_commit_pdb Added following hw constants for chan_inst_target: ram_rl_entry_chan_inst_target_sys_mem_coh_v ram_rl_entry_chan_inst_target_vid_mem_v Change-Id: I85698044b9fe4c8baed71121845e4fb69dc33922 Signed-off-by: seshendra Gadagottu Reviewed-on: https://git-master.nvidia.com/r/1569521 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity Reviewed-by: svccoveritychecker GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | 8 ++++++-- drivers/gpu/nvgpu/gv11b/subctx_gv11b.c | 5 ++++- drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_ram_gv100.h | 8 ++++++++ drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ram_gv11b.h | 8 ++++++++ 4 files changed, 26 insertions(+), 3 deletions(-) (limited to 'drivers/gpu/nvgpu') diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c index 26e444cc..5fe40663 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c @@ -107,9 +107,13 @@ void gv11b_get_ch_runlist_entry(struct channel_gk20a *c, u32 *runlist) ram_rl_entry_chan_runqueue_selector_f( c->t19x.runqueue_sel) | ram_rl_entry_chan_userd_target_f( - ram_rl_entry_chan_userd_target_sys_mem_ncoh_v()) | + nvgpu_aperture_mask(g, &g->fifo.userd, + ram_rl_entry_chan_userd_target_sys_mem_ncoh_v(), + ram_rl_entry_chan_userd_target_vid_mem_v())) | ram_rl_entry_chan_inst_target_f( - ram_rl_entry_chan_userd_target_sys_mem_ncoh_v()); + nvgpu_aperture_mask(g, &c->inst_block, + ram_rl_entry_chan_inst_target_sys_mem_ncoh_v(), + ram_rl_entry_chan_inst_target_vid_mem_v())); addr_lo = u64_lo32(c->userd_iova) >> ram_rl_entry_chan_userd_ptr_align_shift_v(); diff --git a/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c b/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c index 84d21a9a..4951d3a4 100644 --- a/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c @@ -158,12 +158,15 @@ void gv11b_subctx_commit_pdb(struct channel_gk20a *c, u32 format_word; u32 pdb_addr_lo, pdb_addr_hi; u64 pdb_addr; + u32 aperture = nvgpu_aperture_mask(g, vm->pdb.mem, + ram_in_sc_page_dir_base_target_sys_mem_ncoh_v(), + ram_in_sc_page_dir_base_target_vid_mem_v()); pdb_addr = nvgpu_mem_get_addr(g, vm->pdb.mem); pdb_addr_lo = u64_lo32(pdb_addr >> ram_in_base_shift_v()); pdb_addr_hi = u64_hi32(pdb_addr); format_word = ram_in_sc_page_dir_base_target_f( - ram_in_sc_page_dir_base_target_sys_mem_ncoh_v(), 0) | + aperture, 0) | ram_in_sc_page_dir_base_vol_f( ram_in_sc_page_dir_base_vol_true_v(), 0) | ram_in_sc_page_dir_base_fault_replay_tex_f(1, 0) | diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_ram_gv100.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_ram_gv100.h index fa42ebbe..3a5bf6cb 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_ram_gv100.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_ram_gv100.h @@ -672,6 +672,14 @@ static inline u32 ram_rl_entry_chan_inst_target_sys_mem_ncoh_v(void) { return 0x00000003; } +static inline u32 ram_rl_entry_chan_inst_target_sys_mem_coh_v(void) +{ + return 0x00000002U; +} +static inline u32 ram_rl_entry_chan_inst_target_vid_mem_v(void) +{ + return 0x00000000U; +} static inline u32 ram_rl_entry_chan_userd_target_f(u32 v) { return (v & 0x3) << 6; diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ram_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ram_gv11b.h index c7f15f57..fe8bcd6b 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ram_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ram_gv11b.h @@ -672,6 +672,14 @@ static inline u32 ram_rl_entry_chan_inst_target_sys_mem_ncoh_v(void) { return 0x00000003; } +static inline u32 ram_rl_entry_chan_inst_target_sys_mem_coh_v(void) +{ + return 0x00000002U; +} +static inline u32 ram_rl_entry_chan_inst_target_vid_mem_v(void) +{ + return 0x00000000U; +} static inline u32 ram_rl_entry_chan_userd_target_f(u32 v) { return (v & 0x3) << 6; -- cgit v1.2.2