From 01ba044bdbbfa831eb9f507230bac0a1ed67e4ce Mon Sep 17 00:00:00 2001 From: Aingara Paramakuru Date: Thu, 27 Aug 2015 14:01:45 -0400 Subject: gpu: nvgpu: vgpu: add gp10b support Add support for gp10b in a virtualized environment. Bug 1677153 VFND-693 Change-Id: I919ffa44c6773940a7a3411ee8bbc403a992b7cb Signed-off-by: Aingara Paramakuru Reviewed-on: http://git-master/r/792556 Reviewed-on: http://git-master/r/806193 Reviewed-by: Terje Bergstrom Tested-by: Terje Bergstrom --- drivers/gpu/nvgpu/Makefile | 2 +- drivers/gpu/nvgpu/nvgpu_gpuid_t18x.h | 7 +- drivers/gpu/nvgpu/vgpu/gp10b/Makefile | 16 +++ drivers/gpu/nvgpu/vgpu/gp10b/vgpu_fifo_gp10b.c | 20 +++ drivers/gpu/nvgpu/vgpu/gp10b/vgpu_fifo_gp10b.h | 21 +++ drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c | 20 +++ drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.h | 21 +++ drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c | 35 +++++ drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c | 172 +++++++++++++++++++++++++ drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.h | 21 +++ 10 files changed, 333 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/nvgpu/vgpu/gp10b/Makefile create mode 100644 drivers/gpu/nvgpu/vgpu/gp10b/vgpu_fifo_gp10b.c create mode 100644 drivers/gpu/nvgpu/vgpu/gp10b/vgpu_fifo_gp10b.h create mode 100644 drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c create mode 100644 drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.h create mode 100644 drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c create mode 100644 drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c create mode 100644 drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.h (limited to 'drivers/gpu/nvgpu') diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile index f259eefa..37cc15a5 100644 --- a/drivers/gpu/nvgpu/Makefile +++ b/drivers/gpu/nvgpu/Makefile @@ -7,4 +7,4 @@ ccflags-$(CONFIG_GK20A) += -Wno-multichar ccflags-$(CONFIG_GK20A) += -Werror obj-$(CONFIG_GK20A) += gp10b/ - +obj-$(CONFIG_TEGRA_GR_VIRTUALIZATION) += vgpu/gp10b/ diff --git a/drivers/gpu/nvgpu/nvgpu_gpuid_t18x.h b/drivers/gpu/nvgpu/nvgpu_gpuid_t18x.h index 59ecefee..96f02125 100644 --- a/drivers/gpu/nvgpu/nvgpu_gpuid_t18x.h +++ b/drivers/gpu/nvgpu/nvgpu_gpuid_t18x.h @@ -1,7 +1,7 @@ /* * NVIDIA GPU ID functions, definitions. * - * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -28,4 +28,9 @@ struct gpu_ops; extern int gp10b_init_hal(struct gk20a *); extern struct gk20a_platform t18x_gpu_tegra_platform; + +#ifdef CONFIG_TEGRA_GR_VIRTUALIZATION +#define TEGRA_18x_GPUID_VGPU_HAL vgpu_gp10b_init_hal +extern int vgpu_gp10b_init_hal(struct gk20a *); +#endif #endif diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/Makefile b/drivers/gpu/nvgpu/vgpu/gp10b/Makefile new file mode 100644 index 00000000..fed8a08e --- /dev/null +++ b/drivers/gpu/nvgpu/vgpu/gp10b/Makefile @@ -0,0 +1,16 @@ +GCOV_PROFILE := y + +ccflags-$(CONFIG_GK20A) += -I$(srctree)/drivers/gpu/nvgpu +ccflags-$(CONFIG_GK20A) += -I$(srctree)/include +ccflags-$(CONFIG_GK20A) += -I$(srctree)/../kernel-t18x/drivers/gpu/nvgpu +ccflags-$(CONFIG_GK20A) += -I$(srctree)/../kernel-t18x/include +ccflags-$(CONFIG_GK20A) += -I$(srctree)/../kernel-t18x/include/uapi + +ccflags-$(CONFIG_GK20A) += -Wno-multichar +ccflags-y += -Werror + +obj-$(CONFIG_GK20A) += \ + vgpu_hal_gp10b.o \ + vgpu_gr_gp10b.o \ + vgpu_mm_gp10b.o \ + vgpu_fifo_gp10b.o diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_fifo_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_fifo_gp10b.c new file mode 100644 index 00000000..34d942c1 --- /dev/null +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_fifo_gp10b.c @@ -0,0 +1,20 @@ +/* + * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "vgpu_fifo_gp10b.h" + +void vgpu_gp10b_init_fifo_ops(struct gpu_ops *gops) +{ + /* syncpoint protection not supported yet */ + gops->fifo.resetup_ramfc = NULL; +} diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_fifo_gp10b.h b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_fifo_gp10b.h new file mode 100644 index 00000000..4ede0b6d --- /dev/null +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_fifo_gp10b.h @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __VGPU_FIFO_GP10B_H__ +#define __VGPU_FIFO_GP10B_H__ + +#include "gk20a/gk20a.h" + +void vgpu_gp10b_init_fifo_ops(struct gpu_ops *gops); + +#endif diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c new file mode 100644 index 00000000..9df29eee --- /dev/null +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c @@ -0,0 +1,20 @@ +/* + * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "vgpu_gr_gp10b.h" +#include "vgpu/gm20b/vgpu_gr_gm20b.h" + +void vgpu_gp10b_init_gr_ops(struct gpu_ops *gops) +{ + vgpu_gm20b_init_gr_ops(gops); +} diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.h b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.h new file mode 100644 index 00000000..b3be49a7 --- /dev/null +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.h @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __VGPU_GR_GP10B_H__ +#define __VGPU_GR_GP10B_H__ + +#include "gk20a/gk20a.h" + +void vgpu_gp10b_init_gr_ops(struct gpu_ops *gops); + +#endif diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c new file mode 100644 index 00000000..14a7768a --- /dev/null +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include "vgpu/vgpu.h" +#include "gp10b/hal_gp10b.h" +#include "vgpu_gr_gp10b.h" +#include "vgpu_fifo_gp10b.h" +#include "vgpu_mm_gp10b.h" + +int vgpu_gp10b_init_hal(struct gk20a *g) +{ + int err; + + gk20a_dbg_fn(""); + + err = gp10b_init_hal(g); + if (err) + return err; + + vgpu_init_hal_common(g); + vgpu_gp10b_init_gr_ops(&g->ops); + vgpu_gp10b_init_fifo_ops(&g->ops); + vgpu_gp10b_init_mm_ops(&g->ops); + return 0; +} diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c new file mode 100644 index 00000000..0a769e94 --- /dev/null +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.c @@ -0,0 +1,172 @@ +/* + * Virtualized GPU Memory Management + * + * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include "vgpu/vgpu.h" +#include "vgpu_mm_gp10b.h" +#include "gk20a/semaphore_gk20a.h" +#include "gk20a/mm_gk20a.h" + +static int vgpu_gp10b_init_mm_setup_hw(struct gk20a *g) +{ + g->mm.bypass_smmu = true; + g->mm.disable_bigpage = true; + return 0; +} + +static inline int add_mem_desc(struct tegra_vgpu_mem_desc *mem_desc, + u64 addr, u64 size, size_t *oob_size) +{ + if (*oob_size < sizeof(*mem_desc)) + return -ENOMEM; + + mem_desc->addr = addr; + mem_desc->length = size; + *oob_size -= sizeof(*mem_desc); + return 0; +} + +static u64 vgpu_gp10b_locked_gmmu_map(struct vm_gk20a *vm, + u64 map_offset, + struct sg_table *sgt, + u64 buffer_offset, + u64 size, + int pgsz_idx, + u8 kind_v, + u32 ctag_offset, + u32 flags, + int rw_flag, + bool clear_ctags, + bool sparse, + bool priv, + struct vm_gk20a_mapping_batch *batch) +{ + int err = 0; + struct device *d = dev_from_vm(vm); + struct gk20a *g = gk20a_from_vm(vm); + struct gk20a_platform *platform = gk20a_get_platform(g->dev); + struct tegra_vgpu_cmd_msg msg; + struct tegra_vgpu_as_map_ex_params *p = &msg.params.as_map_ex; + struct tegra_vgpu_mem_desc *mem_desc; + u32 page_size = vm->gmmu_page_sizes[pgsz_idx]; + u64 space_to_skip = buffer_offset; + u64 buffer_size = 0; + u32 mem_desc_count = 0; + struct scatterlist *sgl; + void *handle = NULL; + size_t oob_size; + u8 prot; + + gk20a_dbg_fn(""); + + /* FIXME: add support for sparse mappings */ + + if (WARN_ON(!sgt) || WARN_ON(!g->mm.bypass_smmu)) + return -EINVAL; + + if (space_to_skip & (page_size - 1)) + return -EINVAL; + + /* Allocate (or validate when map_offset != 0) the virtual address. */ + if (!map_offset) { + map_offset = gk20a_vm_alloc_va(vm, size, pgsz_idx); + if (!map_offset) { + gk20a_err(d, "failed to allocate va space"); + err = -ENOMEM; + goto fail; + } + } + + handle = tegra_gr_comm_oob_get_ptr(TEGRA_GR_COMM_CTX_CLIENT, + tegra_gr_comm_get_server_vmid(), + TEGRA_VGPU_QUEUE_CMD, + (void **)&mem_desc, &oob_size); + if (!handle) { + err = -EINVAL; + goto fail; + } + + sgl = sgt->sgl; + while (space_to_skip && sgl && + (space_to_skip + page_size > sgl->length)) { + space_to_skip -= sgl->length; + sgl = sg_next(sgl); + } + WARN_ON(!sgl); + + if (add_mem_desc(&mem_desc[mem_desc_count++], + sg_phys(sgl) + space_to_skip, + sgl->length - space_to_skip, + &oob_size)) { + err = -ENOMEM; + goto fail; + } + buffer_size += sgl->length - space_to_skip; + + sgl = sg_next(sgl); + while (sgl && buffer_size < size) { + if (add_mem_desc(&mem_desc[mem_desc_count++], sg_phys(sgl), + sgl->length, &oob_size)) { + err = -ENOMEM; + goto fail; + } + + buffer_size += sgl->length; + sgl = sg_next(sgl); + } + + if (rw_flag == gk20a_mem_flag_read_only) + prot = TEGRA_VGPU_MAP_PROT_READ_ONLY; + else if (rw_flag == gk20a_mem_flag_write_only) + prot = TEGRA_VGPU_MAP_PROT_WRITE_ONLY; + else + prot = TEGRA_VGPU_MAP_PROT_NONE; + + msg.cmd = TEGRA_VGPU_CMD_AS_MAP_EX; + msg.handle = platform->virt_handle; + p->handle = vm->handle; + p->gpu_va = map_offset; + p->size = size; + p->mem_desc_count = mem_desc_count; + p->pgsz_idx = pgsz_idx; + p->iova = 0; + p->kind = kind_v; + p->cacheable = + (flags & NVGPU_MAP_BUFFER_FLAGS_CACHEABLE_TRUE) ? 1 : 0; + p->prot = prot; + p->ctag_offset = ctag_offset; + p->clear_ctags = clear_ctags; + err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); + if (err || msg.ret) + goto fail; + + /* TLB invalidate handled on server side */ + + tegra_gr_comm_oob_put_ptr(handle); + return map_offset; +fail: + if (handle) + tegra_gr_comm_oob_put_ptr(handle); + gk20a_err(d, "%s: failed with err=%d\n", __func__, err); + return 0; +} + +void vgpu_gp10b_init_mm_ops(struct gpu_ops *gops) +{ + gk20a_dbg_fn(""); + + gops->mm.gmmu_map = vgpu_gp10b_locked_gmmu_map; + gops->mm.init_mm_setup_hw = vgpu_gp10b_init_mm_setup_hw; +} diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.h b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.h new file mode 100644 index 00000000..5bdc9d1b --- /dev/null +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_mm_gp10b.h @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __VGPU_MM_GP10B_H__ +#define __VGPU_MM_GP10B_H__ + +#include "gk20a/gk20a.h" + +void vgpu_gp10b_init_mm_ops(struct gpu_ops *gops); + +#endif -- cgit v1.2.2