From d859c5f4a03b975dc493f72a35016e83adad279a Mon Sep 17 00:00:00 2001 From: Vinod G Date: Tue, 10 Jul 2018 16:13:03 -0700 Subject: nvgpu: gv11b: Rearrange gr function Moved gv11b_detect_ecc_enabled_units function from gv11b.c to gr_gv11b.c, as this is being used only in gr_gv11b file. In order to avoid GR code touching fuse registers, as it need to include fuse HW headers in GR code, introduced two fuse HALs which are being called from GR code. is_opt_ecc_enable for checking whether ecc enable bit is set in fuse register and is_opt_feature_overide_disable for checking whether feature override disable bit is set in fuse register. Initialized fuse HAL functions for chips that make use of those HAL functions. JIRA NVGPU-615 Change-Id: Iafe5a3940bb19cb3da51e270403450b63c2f67a3 Signed-off-by: Vinod G Reviewed-on: https://git-master.nvidia.com/r/1775564 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c') diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c index 421f3692..090ac7b4 100644 --- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c @@ -56,6 +56,7 @@ #include "gp10b/regops_gp10b.h" #include "gp10b/therm_gp10b.h" #include "gp10b/priv_ring_gp10b.h" +#include "gp10b/fuse_gp10b.h" #include "gm20b/ltc_gm20b.h" #include "gm20b/gr_gm20b.h" @@ -559,6 +560,9 @@ static const struct gpu_ops vgpu_gp10b_ops = { }, .fuse = { .check_priv_security = vgpu_gp10b_fuse_check_priv_security, + .is_opt_ecc_enable = gp10b_fuse_is_opt_ecc_enable, + .is_opt_feature_override_disable = + gp10b_fuse_is_opt_feature_override_disable, }, .chip_init_gpu_characteristics = vgpu_init_gpu_characteristics, .get_litter_value = gp10b_get_litter_value, -- cgit v1.2.2