From ac292605b5d2c4c27c7d133601594b9692a32fed Mon Sep 17 00:00:00 2001 From: Richard Zhao Date: Tue, 27 Jun 2017 17:43:00 -0700 Subject: gpu: nvgpu: vgpu: fixes for no bar1 support case - add check of is_bar1_supported - move vgpu_init_fifo_setup_hw to hal - assume it's bar1 reg if no "reg-names" in dts Jira VFND-3796 Change-Id: I022a0ed98144bb8f1e7e55f24fcaf928b4a3fe32 Signed-off-by: Richard Zhao Reviewed-on: https://git-master/r/1474716 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Aingara Paramakuru Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | 26 ++++++++++++++++---------- 1 file changed, 16 insertions(+), 10 deletions(-) (limited to 'drivers/gpu/nvgpu/vgpu/fifo_vgpu.c') diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c index 55b3de07..7029498d 100644 --- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c @@ -270,17 +270,21 @@ static int vgpu_init_fifo_setup_sw(struct gk20a *g) } /* bar1 va */ - f->userd.gpu_va = vgpu_bar1_map(g, &f->userd.priv.sgt, f->userd.size); - if (!f->userd.gpu_va) { - dev_err(d, "gmmu mapping failed\n"); - goto clean_up; + if (g->ops.mm.is_bar1_supported(g)) { + f->userd.gpu_va = vgpu_bar1_map(g, &f->userd.priv.sgt, + f->userd.size); + if (!f->userd.gpu_va) { + dev_err(d, "gmmu mapping failed\n"); + goto clean_up; + } + /* if reduced BAR1 range is specified, use offset of 0 + * (server returns offset assuming full BAR1 range) + */ + if (resource_size(g->bar1_mem) == + (resource_size_t)f->userd.size) + f->userd.gpu_va = 0; } - /* if reduced BAR1 range is specified, use offset of 0 - (server returns offset assuming full BAR1 range) */ - if (resource_size(g->bar1_mem) == (resource_size_t)f->userd.size) - f->userd.gpu_va = 0; - gk20a_dbg(gpu_dbg_map_v, "userd bar1 va = 0x%llx", f->userd.gpu_va); f->channel = nvgpu_vzalloc(g, f->num_channels * sizeof(*f->channel)); @@ -403,7 +407,8 @@ int vgpu_init_fifo_support(struct gk20a *g) if (err) return err; - err = vgpu_init_fifo_setup_hw(g); + if (g->ops.fifo.init_fifo_setup_hw) + err = g->ops.fifo.init_fifo_setup_hw(g); return err; } @@ -788,6 +793,7 @@ u32 vgpu_fifo_default_timeslice_us(struct gk20a *g) void vgpu_init_fifo_ops(struct gpu_ops *gops) { + gops->fifo.init_fifo_setup_hw = vgpu_init_fifo_setup_hw; gops->fifo.bind_channel = vgpu_channel_bind; gops->fifo.unbind_channel = vgpu_channel_unbind; gops->fifo.enable_channel = vgpu_channel_enable; -- cgit v1.2.2