From 475af509e1a0433f79a00cfe3f0768cba46b58ea Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Wed, 22 Jun 2016 14:44:22 -0700 Subject: gpu: nvgpu: vgpu: Add CE engine to engine list Add CE engine to vgpu engine list. CE engine is defined differently for different GPUs, so we also add HAL for initializing the engine info. Bug 1780185 Change-Id: I5ae265551feac08d0c4d45402dd3277514e62b2d Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/1169720 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Aingara Paramakuru Tested-by: Aingara Paramakuru GVS: Gerrit_Virtual_Submit Reviewed-by: Lakshmanan M --- drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) (limited to 'drivers/gpu/nvgpu/vgpu/fifo_vgpu.c') diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c index 11f389fb..ffa16cd3 100644 --- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c @@ -160,22 +160,29 @@ static int vgpu_channel_setup_ramfc(struct channel_gk20a *ch, u64 gpfifo_base, return (err || msg.ret) ? -ENOMEM : 0; } -static int init_engine_info(struct fifo_gk20a *f) +static int vgpu_fifo_init_engine_info(struct fifo_gk20a *f) { struct fifo_engine_info_gk20a *gr_info; + struct fifo_engine_info_gk20a *ce_info; const u32 gr_sw_id = ENGINE_GR_GK20A; + const u32 ce_sw_id = ENGINE_GRCE_GK20A; gk20a_dbg_fn(""); - /* all we really care about finding is the graphics entry */ - /* especially early on in sim it probably thinks it has more */ - f->num_engines = 1; + f->num_engines = 2; - gr_info = f->engine_info + gr_sw_id; + gr_info = &f->engine_info[0]; /* FIXME: retrieve this from server */ gr_info->runlist_id = 0; - f->active_engines_list[0] = gr_sw_id; + gr_info->engine_enum = gr_sw_id; + f->active_engines_list[0] = 0; + + ce_info = &f->engine_info[1]; + ce_info->runlist_id = 0; + ce_info->inst_id = 2; + ce_info->engine_enum = ce_sw_id; + f->active_engines_list[1] = 1; return 0; } @@ -292,7 +299,7 @@ static int vgpu_init_fifo_setup_sw(struct gk20a *g) } memset(f->active_engines_list, 0xff, (f->max_engines * sizeof(u32))); - init_engine_info(f); + g->ops.fifo.init_engine_info(f); init_runlist(g, f); @@ -778,4 +785,5 @@ void vgpu_init_fifo_ops(struct gpu_ops *gops) gops->fifo.set_runlist_interleave = vgpu_fifo_set_runlist_interleave; gops->fifo.channel_set_timeslice = vgpu_channel_set_timeslice; gops->fifo.force_reset_ch = vgpu_fifo_force_reset_ch; + gops->fifo.init_engine_info = vgpu_fifo_init_engine_info; } -- cgit v1.2.2