From c7a3b6db10900e0aabc29ca7307908875d685036 Mon Sep 17 00:00:00 2001 From: smadhavan Date: Thu, 6 Sep 2018 14:08:00 +0530 Subject: gpu: nvgpu: Fix MISRA 15.6 violations MISRA Rule-15.6 requires that all if-else blocks be enclosed in braces, including single statement blocks. Fix errors due to single statement if blocks without braces by introducing the braces. JIRA NVGPU-671 Change-Id: I8046a09fa7ffc74c3d737ba57132a0a9ae2ff195 Signed-off-by: smadhavan Reviewed-on: https://git-master.nvidia.com/r/1797699 Reviewed-by: svc-misra-checker Reviewed-by: Nitin Kumbhar GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta Reviewed-by: Vijayakumar Subbu Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/therm/thrmpmu.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/nvgpu/therm/thrmpmu.c') diff --git a/drivers/gpu/nvgpu/therm/thrmpmu.c b/drivers/gpu/nvgpu/therm/thrmpmu.c index 7814cf5e..e23d1d63 100644 --- a/drivers/gpu/nvgpu/therm/thrmpmu.c +++ b/drivers/gpu/nvgpu/therm/thrmpmu.c @@ -43,11 +43,12 @@ static void therm_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg, return; } - if (!phandlerparams->prpccall->b_supported) + if (!phandlerparams->prpccall->b_supported) { nvgpu_err(g, "RPC msg %x failed", msg->msg.pmgr.msg_type); - else + } else { phandlerparams->success = 1; + } } int therm_send_pmgr_tables_to_pmu(struct gk20a *g) -- cgit v1.2.2