From 04d9de84783bcf16f97516fa9602d118820831f4 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Thu, 6 Apr 2017 13:15:09 -0700 Subject: gpu: nvgpu: tegra: linux: Use new error macros gk20a_err() and gk20a_warn() require a struct device pointer, which is not portable across operating systems. The new nvgpu_err() and nvgpu_warn() macros take struct gk20a pointer. Convert code to use the more portable macros. JIRA NVGPU-16 Change-Id: I248295107c5959a98ff00917e0474bcd03708156 Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/1457356 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Alex Waterman --- drivers/gpu/nvgpu/tegra/linux/clk.c | 4 ++-- .../gpu/nvgpu/tegra/linux/platform_gk20a_tegra.c | 23 +++++++++++----------- .../gpu/nvgpu/tegra/linux/platform_gp10b_tegra.c | 7 ++++--- 3 files changed, 18 insertions(+), 16 deletions(-) (limited to 'drivers/gpu/nvgpu/tegra') diff --git a/drivers/gpu/nvgpu/tegra/linux/clk.c b/drivers/gpu/nvgpu/tegra/linux/clk.c index 3982054c..e1d715b9 100644 --- a/drivers/gpu/nvgpu/tegra/linux/clk.c +++ b/drivers/gpu/nvgpu/tegra/linux/clk.c @@ -36,7 +36,7 @@ static unsigned long nvgpu_linux_clk_get_rate(struct gk20a *g, u32 api_domain) ret = clk_get_rate(platform->clk[1]); break; default: - gk20a_err(g->dev, "unknown clock: %u", api_domain); + nvgpu_err(g, "unknown clock: %u", api_domain); ret = 0; break; } @@ -61,7 +61,7 @@ static int nvgpu_linux_clk_set_rate(struct gk20a *g, ret = clk_set_rate(platform->clk[1], rate); break; default: - gk20a_err(g->dev, "unknown clock: %u", api_domain); + nvgpu_err(g, "unknown clock: %u", api_domain); ret = -EINVAL; break; } diff --git a/drivers/gpu/nvgpu/tegra/linux/platform_gk20a_tegra.c b/drivers/gpu/nvgpu/tegra/linux/platform_gk20a_tegra.c index 5b2958ec..4f8faf5a 100644 --- a/drivers/gpu/nvgpu/tegra/linux/platform_gk20a_tegra.c +++ b/drivers/gpu/nvgpu/tegra/linux/platform_gk20a_tegra.c @@ -166,12 +166,12 @@ int gk20a_tegra_secure_alloc(struct device *dev, sgt = nvgpu_kzalloc(platform->g, sizeof(*sgt)); if (!sgt) { - gk20a_err(dev, "failed to allocate memory\n"); + nvgpu_err(platform->g, "failed to allocate memory"); goto fail; } err = sg_alloc_table(sgt, 1, GFP_KERNEL); if (err) { - gk20a_err(dev, "failed to allocate sg_table\n"); + nvgpu_err(platform->g, "failed to allocate sg_table"); goto fail_sgt; } page = phys_to_page(iova); @@ -427,7 +427,7 @@ static int gk20a_tegra_railgate(struct device *dev) return 0; err_power_off: - gk20a_err(dev, "Could not railgate GPU"); + nvgpu_err(get_gk20a(dev), "Could not railgate GPU"); return ret; } @@ -463,12 +463,12 @@ static int gk20a_tegra_unrailgate(struct device *dev) if (!first) { ret = clk_enable(platform->clk[0]); if (ret) { - gk20a_err(dev, "could not turn on gpu pll"); + nvgpu_err(platform->g, "could not turn on gpu pll"); goto err_clk_on; } ret = clk_enable(platform->clk[1]); if (ret) { - gk20a_err(dev, "could not turn on pwr clock"); + nvgpu_err(platform->g, "could not turn on pwr clock"); goto err_clk_on; } } @@ -581,7 +581,7 @@ static int gm20b_tegra_railgate(struct device *dev) return 0; err_power_off: - gk20a_err(dev, "Could not railgate GPU"); + nvgpu_err(platform->g, "Could not railgate GPU"); return ret; } @@ -595,6 +595,7 @@ err_power_off: static int gm20b_tegra_unrailgate(struct device *dev) { struct gk20a_platform *platform = dev_get_drvdata(dev); + struct gk20a *g = platform->g; int ret = 0; bool first = false; @@ -625,7 +626,7 @@ static int gm20b_tegra_unrailgate(struct device *dev) if (!platform->clk_reset) { platform->clk_reset = clk_get(dev, "gpu_gate"); if (IS_ERR(platform->clk_reset)) { - gk20a_err(dev, "fail to get gpu reset clk\n"); + nvgpu_err(g, "fail to get gpu reset clk"); goto err_clk_on; } } @@ -633,25 +634,25 @@ static int gm20b_tegra_unrailgate(struct device *dev) if (!first) { ret = clk_prepare_enable(platform->clk_reset); if (ret) { - gk20a_err(dev, "could not turn on gpu_gate"); + nvgpu_err(g, "could not turn on gpu_gate"); goto err_clk_on; } ret = clk_prepare_enable(platform->clk[0]); if (ret) { - gk20a_err(dev, "could not turn on gpu pll"); + nvgpu_err(g, "could not turn on gpu pll"); goto err_clk_on; } ret = clk_prepare_enable(platform->clk[1]); if (ret) { - gk20a_err(dev, "could not turn on pwr clock"); + nvgpu_err(g, "could not turn on pwr clock"); goto err_clk_on; } if (platform->clk[3]) { ret = clk_prepare_enable(platform->clk[3]); if (ret) { - gk20a_err(dev, "could not turn on fuse clock"); + nvgpu_err(g, "could not turn on fuse clock"); goto err_clk_on; } } diff --git a/drivers/gpu/nvgpu/tegra/linux/platform_gp10b_tegra.c b/drivers/gpu/nvgpu/tegra/linux/platform_gp10b_tegra.c index 6351e895..6d9299b7 100644 --- a/drivers/gpu/nvgpu/tegra/linux/platform_gp10b_tegra.c +++ b/drivers/gpu/nvgpu/tegra/linux/platform_gp10b_tegra.c @@ -84,7 +84,7 @@ int gp10b_tegra_get_clocks(struct device *dev) c = clk_get(dev, tegra_gp10b_clocks[i].name); if (IS_ERR(c)) { - gk20a_err(dev, "cannot get clock %s", + nvgpu_err(platform->g, "cannot get clock %s", tegra_gp10b_clocks[i].name); } else { clk_set_rate(c, rate); @@ -125,6 +125,7 @@ static void gp10b_tegra_scale_exit(struct device *dev) static int gp10b_tegra_probe(struct device *dev) { struct gk20a_platform *platform = dev_get_drvdata(dev); + struct gk20a *g = platform->g; struct device_node *np = dev->of_node; struct device_node *host1x_node; struct platform_device *host1x_pdev; @@ -132,14 +133,14 @@ static int gp10b_tegra_probe(struct device *dev) host1x_ptr = of_get_property(np, "nvidia,host1x", NULL); if (!host1x_ptr) { - gk20a_err(dev, "host1x device not available"); + nvgpu_err(g, "host1x device not available"); return -ENOSYS; } host1x_node = of_find_node_by_phandle(be32_to_cpup(host1x_ptr)); host1x_pdev = of_find_device_by_node(host1x_node); if (!host1x_pdev) { - gk20a_err(dev, "host1x device not available"); + nvgpu_err(g, "host1x device not available"); return -ENOSYS; } -- cgit v1.2.2