From 8cc67f60644a117eec868fc1b11da9a60d2915d7 Mon Sep 17 00:00:00 2001 From: Vijayakumar Date: Fri, 4 Nov 2016 16:47:51 +0530 Subject: gpu: nvgpu: add clock freq controller support JIRA DNVGPU-170 1) Add clock frequency controller VBIOS structure definitions 2) Parse VBIOS tables and build boardobj structures for clock frequency controller. 3) send clock frequency controller data structures to PMU 4) implement public function to send load/unload command to pmu to enable/disable clock frequency controller support Change-Id: I2f37f6a94f342b6fcc71bb802e6e440a0a454486 Signed-off-by: Vijayakumar Reviewed-on: http://git-master/r/1248209 Reviewed-by: Terje Bergstrom Tested-by: Terje Bergstrom (cherry picked from commit ed3e27933f21e10b3d7a5257f1b751526945bd07) Reviewed-on: http://git-master/r/1270897 GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/pstate/pstate.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'drivers/gpu/nvgpu/pstate') diff --git a/drivers/gpu/nvgpu/pstate/pstate.c b/drivers/gpu/nvgpu/pstate/pstate.c index cf758023..cca6c445 100644 --- a/drivers/gpu/nvgpu/pstate/pstate.c +++ b/drivers/gpu/nvgpu/pstate/pstate.c @@ -79,6 +79,11 @@ int gk20a_init_pstate_support(struct gk20a *g) return err; err = pmgr_domain_sw_setup(g); + if (err) + return err; + + err = clk_freq_controller_sw_setup(g); + return err; } @@ -141,6 +146,10 @@ int gk20a_init_pstate_pmu_support(struct gk20a *g) if (err) return err; + err = clk_freq_controller_pmu_setup(g); + if (err) + return err; + err = clk_pmu_vin_load(g); if (err) return err; -- cgit v1.2.2