From feefb7046a88311d88a37ad2cc934ec7b9a9c28f Mon Sep 17 00:00:00 2001 From: ddutta Date: Tue, 18 Sep 2018 12:44:44 +0530 Subject: gpu: nvgpu: minor fixes in channel_sync.c This patch comes as a follow up to commit 2517d59be282426eec7a97745b76d745ff36c388 containing minor fixes i.e. changing type of 'pos' to u32 instead of int and renaming syncpt_get_id to channel_sync_syncpt_get_id Jira NVGPU-1086 Change-Id: I8bd9271c20d88ff5f68ccfc48a0b533844bbcaaa Signed-off-by: Debarshi Dutta Reviewed-on: https://git-master.nvidia.com/r/1829832 Reviewed-by: svc-misra-checker Reviewed-by: Konsta Holtta Reviewed-by: Alex Waterman GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/include/nvgpu/channel_sync.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/gpu/nvgpu/include') diff --git a/drivers/gpu/nvgpu/include/nvgpu/channel_sync.h b/drivers/gpu/nvgpu/include/nvgpu/channel_sync.h index b5936edc..f0b2b860 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/channel_sync.h +++ b/drivers/gpu/nvgpu/include/nvgpu/channel_sync.h @@ -98,11 +98,11 @@ struct nvgpu_channel_sync { void channel_sync_semaphore_gen_wait_cmd(struct channel_gk20a *c, struct nvgpu_semaphore *sema, struct priv_cmd_entry *wait_cmd, - u32 wait_cmd_size, int pos); + u32 wait_cmd_size, u32 pos); int channel_sync_syncpt_gen_wait_cmd(struct channel_gk20a *c, u32 id, u32 thresh, struct priv_cmd_entry *wait_cmd, - u32 wait_cmd_size, int pos, bool preallocated); + u32 wait_cmd_size, u32 pos, bool preallocated); void nvgpu_channel_sync_destroy(struct nvgpu_channel_sync *sync, bool set_safe_state); @@ -110,4 +110,4 @@ struct nvgpu_channel_sync *nvgpu_channel_sync_create(struct channel_gk20a *c, bool user_managed); bool nvgpu_channel_sync_needs_os_fence_framework(struct gk20a *g); -#endif /* NVGPU_GK20A_CHANNEL_SYNC_GK20A_H */ +#endif /* NVGPU_CHANNEL_SYNC_H */ -- cgit v1.2.2