From e02d14e7542aed80c8f37c12a1d5df127146fbd3 Mon Sep 17 00:00:00 2001 From: David Nieto Date: Wed, 4 Oct 2017 10:44:40 -0700 Subject: gpu: nvgpu: ce: tsg and large vidmem support Some GPUs require all channels to be on TSG and also have larger than 4GB vidmem sizes which were not supported on the previous CE2 code. This change creates a new property to track if the copy engine needs to encapsulate its kernel context on tsg and also modifies the copy engine code to support much larger copies without dramatically increasing the PB size. JIRA: EVLR-1990 Change-Id: Ieb4acba0c787eb96cb9c7cd97f884d2119d445aa Signed-off-by: David Nieto Reviewed-on: https://git-master.nvidia.com/r/1573216 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity Reviewed-by: Terje Bergstrom Reviewed-by: Alex Waterman GVS: Gerrit_Virtual_Submit Reviewed-by: Nirav Patel --- drivers/gpu/nvgpu/include/nvgpu/enabled.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/gpu/nvgpu/include') diff --git a/drivers/gpu/nvgpu/include/nvgpu/enabled.h b/drivers/gpu/nvgpu/include/nvgpu/enabled.h index 41758fe7..8c0bb9d3 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/enabled.h +++ b/drivers/gpu/nvgpu/include/nvgpu/enabled.h @@ -42,6 +42,8 @@ struct gk20a; #define NVGPU_MM_HONORS_APERTURE 17 /* unified or split memory with separate vidmem? */ #define NVGPU_MM_UNIFIED_MEMORY 18 +/* kernel mode ce vidmem clearing channels need to be in a tsg */ +#define NVGPU_MM_CE_TSG_REQUIRED 19 /* * Security flags -- cgit v1.2.2