From 78151bb6f9cf9f355c57a28df0c7e4cd867c3322 Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Fri, 6 Apr 2018 18:38:18 +0530 Subject: gpu: nvgpu: use HAL for chiplet offset We currently use hard coded values of NV_PERF_PMMGPC_CHIPLET_OFFSET and NV_PMM_FBP_STRIDE which are incorrect for Volta Add new GR HAL get_pmm_per_chiplet_offset() to get correct value per-chip Set gr_gm20b_get_pmm_per_chiplet_offset() for older chips Set gr_gv11b_get_pmm_per_chiplet_offset() for Volta Use HAL instead of hard coded values wherever required Bug 200398811 Jira NVGPU-556 Change-Id: I947e7febd4f84fae740a1bc74f99d72e1df523aa Signed-off-by: Deepak Nibade Reviewed-on: https://git-master.nvidia.com/r/1690028 Reviewed-by: svc-mobile-coverity Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_perf_gm20b.h | 10 +++++++++- drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_perf_gp106.h | 10 +++++++++- drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_perf_gp10b.h | 10 +++++++++- 3 files changed, 27 insertions(+), 3 deletions(-) (limited to 'drivers/gpu/nvgpu/include') diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_perf_gm20b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_perf_gm20b.h index ae34cabd..a94ba307 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_perf_gm20b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_perf_gm20b.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2015-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -56,6 +56,14 @@ #ifndef _hw_perf_gm20b_h_ #define _hw_perf_gm20b_h_ +static inline u32 perf_pmmsys_base_v(void) +{ + return 0x001b0000U; +} +static inline u32 perf_pmmsys_extent_v(void) +{ + return 0x001b0fffU; +} static inline u32 perf_pmasys_control_r(void) { return 0x001b4000U; diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_perf_gp106.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_perf_gp106.h index b0182789..334cd200 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_perf_gp106.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_perf_gp106.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -56,6 +56,14 @@ #ifndef _hw_perf_gp106_h_ #define _hw_perf_gp106_h_ +static inline u32 perf_pmmsys_base_v(void) +{ + return 0x001b0000U; +} +static inline u32 perf_pmmsys_extent_v(void) +{ + return 0x001b0fffU; +} static inline u32 perf_pmasys_control_r(void) { return 0x001b4000U; diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_perf_gp10b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_perf_gp10b.h index aa0fafe7..43424e13 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_perf_gp10b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_perf_gp10b.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2015-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -56,6 +56,14 @@ #ifndef _hw_perf_gp10b_h_ #define _hw_perf_gp10b_h_ +static inline u32 perf_pmmsys_base_v(void) +{ + return 0x001b0000U; +} +static inline u32 perf_pmmsys_extent_v(void) +{ + return 0x001b0fffU; +} static inline u32 perf_pmasys_control_r(void) { return 0x001b4000U; -- cgit v1.2.2