From 6662188868b824d1fa99292cff0ce82b55d180ce Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Thu, 16 Aug 2018 12:51:25 -0700 Subject: gpu: nvgpu: Do not refer to RAM_IN fields in FB Do not refer to bit width in RAM_IN field when shifting MMU fault buffer entries. Export the correct bit shift values for the fields and shift with that. Change-Id: I6878118bb14f070626e8244d5044b6818c8ea283 Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1801417 Reviewed-by: svc-misra-checker GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h | 14 +++++++++++++- drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gmmu_gv11b.h | 10 +++++++++- 2 files changed, 22 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/nvgpu/include') diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h index ea3c7939..5c4477a0 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -1112,6 +1112,10 @@ static inline u32 fb_mmu_fault_buffer_lo_addr_v(u32 r) { return (r >> 12U) & 0xfffffU; } +static inline u32 fb_mmu_fault_buffer_lo_addr_b(void) +{ + return 12U; +} static inline u32 fb_mmu_fault_buffer_hi_r(u32 i) { return 0x00100e28U + i*20U; @@ -1340,6 +1344,10 @@ static inline u32 fb_mmu_fault_addr_lo_addr_v(u32 r) { return (r >> 12U) & 0xfffffU; } +static inline u32 fb_mmu_fault_addr_lo_addr_b(void) +{ + return 12U; +} static inline u32 fb_mmu_fault_addr_hi_r(void) { return 0x00100e50U; @@ -1380,6 +1388,10 @@ static inline u32 fb_mmu_fault_inst_lo_addr_v(u32 r) { return (r >> 12U) & 0xfffffU; } +static inline u32 fb_mmu_fault_inst_lo_addr_b(void) +{ + return 12U; +} static inline u32 fb_mmu_fault_inst_hi_r(void) { return 0x00100e58U; diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gmmu_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gmmu_gv11b.h index 0a442b1f..980f54c1 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gmmu_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gmmu_gv11b.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -1320,6 +1320,10 @@ static inline u32 gmmu_fault_buf_entry_inst_lo_v(u32 r) { return (r >> 12U) & 0xfffffU; } +static inline u32 gmmu_fault_buf_entry_inst_lo_b(void) +{ + return 12U; +} static inline u32 gmmu_fault_buf_entry_inst_lo_w(void) { return 0U; @@ -1348,6 +1352,10 @@ static inline u32 gmmu_fault_buf_entry_addr_lo_v(u32 r) { return (r >> 12U) & 0xfffffU; } +static inline u32 gmmu_fault_buf_entry_addr_lo_b(void) +{ + return 12U; +} static inline u32 gmmu_fault_buf_entry_addr_lo_w(void) { return 2U; -- cgit v1.2.2