From fd8d020ae34636348f3dbcf58ce442fde67c4732 Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Tue, 28 Nov 2017 06:31:26 -0800 Subject: gpu: nvgpu: remove linux and soc includes from gr_gv11b.c Remove all linux and soc specific includes from common source file gr_gv11b.c Use common nvgpu_usleep_range() instead of linux specific usleep_range() Remove redundant kernel version checks pertaining to unsupported kernel versions Use nvgpu_tegra_fuse_*() APIs instead of soc specific APIs Jira NVGPU-405 Change-Id: I6f1602c6ab9f61046d68d3c465eb23873910960d Signed-off-by: Deepak Nibade Reviewed-on: https://git-master.nvidia.com/r/1606980 Reviewed-by: Terje Bergstrom Tested-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 25 +++++++------------------ 1 file changed, 7 insertions(+), 18 deletions(-) (limited to 'drivers/gpu/nvgpu/gv11b') diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index 9c3c8b81..f2397108 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c @@ -22,19 +22,13 @@ * DEALINGS IN THE SOFTWARE. */ -#include -#include -#include -#include - -#include - #include #include #include #include #include #include +#include #include "gk20a/gk20a.h" #include "gk20a/gr_gk20a.h" @@ -1644,7 +1638,7 @@ int gr_gv11b_wait_empty(struct gk20a *g, unsigned long duration_ms, return 0; } - usleep_range(delay, delay * 2); + nvgpu_usleep_range(delay, delay * 2); delay = min_t(u32, delay << 1, GR_IDLE_CHECK_MAX); } while (!nvgpu_timeout_expired(&timeout)); @@ -1686,20 +1680,15 @@ void gr_gv11b_commit_global_attrib_cb(struct gk20a *g, void gr_gv11b_set_gpc_tpc_mask(struct gk20a *g, u32 gpc_index) { -#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0) - tegra_fuse_writel(0x1, FUSE_FUSEBYPASS_0); - tegra_fuse_writel(0x0, FUSE_WRITE_ACCESS_SW_0); -#else - tegra_fuse_control_write(0x1, FUSE_FUSEBYPASS_0); - tegra_fuse_control_write(0x0, FUSE_WRITE_ACCESS_SW_0); -#endif + nvgpu_tegra_fuse_write_bypass(g, 0x1); + nvgpu_tegra_fuse_write_access_sw(g, 0x0); if (g->gr.gpc_tpc_mask[gpc_index] == 0x1) - tegra_fuse_writel(0x2, FUSE_OPT_GPU_TPC0_DISABLE_0); + nvgpu_tegra_fuse_write_opt_gpu_tpc0_disable(g, 0x2); else if (g->gr.gpc_tpc_mask[gpc_index] == 0x2) - tegra_fuse_writel(0x1, FUSE_OPT_GPU_TPC0_DISABLE_0); + nvgpu_tegra_fuse_write_opt_gpu_tpc0_disable(g, 0x1); else - tegra_fuse_writel(0x0, FUSE_OPT_GPU_TPC0_DISABLE_0); + nvgpu_tegra_fuse_write_opt_gpu_tpc0_disable(g, 0x0); } void gr_gv11b_get_access_map(struct gk20a *g, -- cgit v1.2.2