From e9de95d7e0629c40b5ceb56c07de319bedd3339f Mon Sep 17 00:00:00 2001 From: seshendra Gadagottu Date: Tue, 9 Jan 2018 14:33:51 -0800 Subject: gpu: nvgpu: use chip specific zbc_c/z format reg Use chip specific gpcs_swdx_dss_zbc_c_format_reg and gpcs_swdx_dss_zbc_z_format_reg. These registers are different for gv11b/gv100 from gp10b/gp106. Change-Id: I9e209c878a11edc986ba4304ff60fcccbb5087aa Signed-off-by: seshendra Gadagottu Reviewed-on: https://git-master.nvidia.com/r/1635091 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 10 ++++++++++ drivers/gpu/nvgpu/gv11b/gr_gv11b.h | 2 ++ drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 4 ++++ 3 files changed, 16 insertions(+) (limited to 'drivers/gpu/nvgpu/gv11b') diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index f369e12e..baad5e47 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c @@ -4152,3 +4152,13 @@ void gr_gv11b_ecc_init_scrub_reg(struct gk20a *g) nvgpu_warn(g, "ECC SCRUB SM ICACHE Failed"); } + +u32 gr_gv11b_get_gpcs_swdx_dss_zbc_c_format_reg(struct gk20a *g) +{ + return gr_gpcs_swdx_dss_zbc_c_01_to_04_format_r(); +} + +u32 gr_gv11b_get_gpcs_swdx_dss_zbc_z_format_reg(struct gk20a *g) +{ + return gr_gpcs_swdx_dss_zbc_z_01_to_04_format_r(); +} diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h index 17e5e9e3..b69e69bd 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h @@ -102,6 +102,8 @@ int gr_gv11b_handle_gpc_gpcmmu_exception(struct gk20a *g, u32 gpc, int gr_gv11b_handle_gpc_gpccs_exception(struct gk20a *g, u32 gpc, u32 gpc_exception); void gr_gv11b_enable_gpc_exceptions(struct gk20a *g); +u32 gr_gv11b_get_gpcs_swdx_dss_zbc_c_format_reg(struct gk20a *g); +u32 gr_gv11b_get_gpcs_swdx_dss_zbc_z_format_reg(struct gk20a *g); int gr_gv11b_handle_tex_exception(struct gk20a *g, u32 gpc, u32 tpc, bool *post_event); int gr_gv11b_zbc_s_query_table(struct gk20a *g, struct gr_gk20a *gr, diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 9156d9b8..f19832b9 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c @@ -281,6 +281,10 @@ static const struct gpu_ops gv11b_ops = { .detect_sm_arch = gr_gv11b_detect_sm_arch, .add_zbc_color = gr_gp10b_add_zbc_color, .add_zbc_depth = gr_gp10b_add_zbc_depth, + .get_gpcs_swdx_dss_zbc_c_format_reg = + gr_gv11b_get_gpcs_swdx_dss_zbc_c_format_reg, + .get_gpcs_swdx_dss_zbc_z_format_reg = + gr_gv11b_get_gpcs_swdx_dss_zbc_z_format_reg, .zbc_set_table = gk20a_gr_zbc_set_table, .zbc_query_table = gr_gk20a_query_zbc, .pmu_save_zbc = gk20a_pmu_save_zbc, -- cgit v1.2.2