From c6ccb5f2a1e9a8999436f6c28ed5c416c5418ae3 Mon Sep 17 00:00:00 2001 From: seshendra Gadagottu Date: Mon, 23 Oct 2017 10:20:12 -0700 Subject: gpu: nvgpu: gv11b: use scg perf for smid numbering For SCG to work, smid numbering needs to be done based on scg performance of tpcs. For gv11b and gv11b vgpu, reuse gv100 function "gr_gv100_init_sm_id_table" to do this. Used local variable "index" to avoid multiple computations in the function: gr_gv100_init_sm_id_table index = sm_id + sm Add deug info for printing initialized gpc/tpc/sm/global_tpc indexs. Bug 1842197 Change-Id: Ibf10f47f10a8ca58b86c307a22e159b2cc0d0f43 Signed-off-by: seshendra Gadagottu Reviewed-on: https://git-master.nvidia.com/r/1583916 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 27 --------------------------- drivers/gpu/nvgpu/gv11b/gr_gv11b.h | 1 - drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 4 +++- 3 files changed, 3 insertions(+), 29 deletions(-) (limited to 'drivers/gpu/nvgpu/gv11b') diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index 154088d6..fc894908 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c @@ -2125,33 +2125,6 @@ void gr_gv11b_detect_sm_arch(struct gk20a *g) gr_gpc0_tpc0_sm_arch_warp_count_v(v); } -void gr_gv11b_init_sm_id_table(struct gk20a *g) -{ - u32 gpc, tpc, sm; - u32 sm_id = 0; - u32 sm_per_tpc = nvgpu_get_litter_value(g, GPU_LIT_NUM_SM_PER_TPC); - - /* TODO populate smids based on power efficiency */ - for (tpc = 0; tpc < g->gr.max_tpc_per_gpc_count; tpc++) { - for (gpc = 0; gpc < g->gr.gpc_count; gpc++) { - - if (tpc >= g->gr.gpc_tpc_count[gpc]) - continue; - - for (sm = 0; sm < sm_per_tpc; sm++) { - g->gr.sm_to_cluster[sm_id].tpc_index = tpc; - g->gr.sm_to_cluster[sm_id].gpc_index = gpc; - g->gr.sm_to_cluster[sm_id].sm_index = sm_id % 2; - g->gr.sm_to_cluster[sm_id].global_tpc_index = - tpc; - sm_id++; - } - } - } - g->gr.no_of_sm = sm_id; - nvgpu_log_info(g, " total number of sm = %d", g->gr.no_of_sm); -} - void gr_gv11b_program_sm_id_numbering(struct gk20a *g, u32 gpc, u32 tpc, u32 smid) { diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h index ed469abd..e469d142 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h @@ -138,7 +138,6 @@ int gr_gv11b_handle_fecs_error(struct gk20a *g, int gr_gv11b_setup_rop_mapping(struct gk20a *g, struct gr_gk20a *gr); int gr_gv11b_init_sw_veid_bundle(struct gk20a *g); void gr_gv11b_detect_sm_arch(struct gk20a *g); -void gr_gv11b_init_sm_id_table(struct gk20a *g); void gr_gv11b_program_sm_id_numbering(struct gk20a *g, u32 gpc, u32 tpc, u32 smid); int gr_gv11b_load_smid_config(struct gk20a *g); diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 46323cf9..8e4cdab8 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c @@ -66,6 +66,8 @@ #include "gp106/pmu_gp106.h" #include "gp106/acr_gp106.h" +#include "gv100/gr_gv100.h" + #include "dbg_gpu_gv11b.h" #include "hal_gv11b.h" #include "css_gr_gv11b.h" @@ -298,7 +300,7 @@ static const struct gpu_ops gv11b_ops = { .resume_contexts = gr_gk20a_resume_contexts, .get_preemption_mode_flags = gr_gp10b_get_preemption_mode_flags, .fuse_override = gp10b_gr_fuse_override, - .init_sm_id_table = gr_gv11b_init_sm_id_table, + .init_sm_id_table = gr_gv100_init_sm_id_table, .load_smid_config = gr_gv11b_load_smid_config, .program_sm_id_numbering = gr_gv11b_program_sm_id_numbering, .is_ltcs_ltss_addr = gr_gm20b_is_ltcs_ltss_addr, -- cgit v1.2.2