From b5d3cf444eeeb62a593365532b22e44f9360a484 Mon Sep 17 00:00:00 2001 From: Alex Waterman Date: Wed, 21 Feb 2018 15:59:56 -0800 Subject: gpu: nvgpu: Cleanup unused variables There are numerous places where variables are assigned to but then never used. This patch cleans up all these unused variables and in some cases simplifies surrounding logic. Also delete unused header includes and add necessary header includes. JIRA NVGPU-525 Signed-off-by: Alex Waterman Change-Id: Ice9ec2a0e97f262d0dcfebe22f83208dbea569d9 Reviewed-on: https://git-master.nvidia.com/r/1662548 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | 20 ++++++++------------ drivers/gpu/nvgpu/gv11b/pmu_gv11b.c | 4 +--- 2 files changed, 9 insertions(+), 15 deletions(-) (limited to 'drivers/gpu/nvgpu/gv11b') diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c index 8e9e1818..89f3f0b9 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c @@ -33,6 +33,7 @@ #include #include #include +#include #include #include @@ -932,7 +933,6 @@ void gv11b_fifo_teardown_ch_tsg(struct gk20a *g, u32 act_eng_bitmask, u32 id, unsigned int id_type, unsigned int rc_type, struct mmu_fault_info *mmfault) { - bool verbose = false; struct tsg_gk20a *tsg = NULL; struct channel_gk20a *refch = NULL; u32 runlists_mask, runlist_id; @@ -1049,22 +1049,18 @@ void gv11b_fifo_teardown_ch_tsg(struct gk20a *g, u32 act_eng_bitmask, #endif if (tsg) { - if (!g->fifo.deferred_reset_pending) { - if (rc_type == RC_TYPE_MMU_FAULT) { - gk20a_fifo_set_ctx_mmu_error_tsg(g, tsg); - verbose = gk20a_fifo_error_tsg(g, tsg); - } - } + if (!g->fifo.deferred_reset_pending && + rc_type == RC_TYPE_MMU_FAULT) + gk20a_fifo_set_ctx_mmu_error_tsg(g, tsg); + gk20a_fifo_abort_tsg(g, tsg->tsgid, false); if (refch) gk20a_channel_put(refch); } else if (refch) { - if (!g->fifo.deferred_reset_pending) { - if (rc_type == RC_TYPE_MMU_FAULT) { + if (!g->fifo.deferred_reset_pending && + rc_type == RC_TYPE_MMU_FAULT) gk20a_fifo_set_ctx_mmu_error_ch(g, refch); - verbose = gk20a_fifo_error_ch(g, refch); - } - } + gk20a_channel_abort(refch, false); gk20a_channel_put(refch); } else { diff --git a/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c b/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c index e4cfe925..7dd4f8f4 100644 --- a/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c @@ -184,7 +184,7 @@ int gv11b_pmu_bootstrap(struct nvgpu_pmu *pmu) struct mm_gk20a *mm = &g->mm; struct pmu_ucode_desc *desc = pmu->desc; u64 addr_code_lo, addr_data_lo, addr_load_lo; - u64 addr_code_hi, addr_data_hi, addr_load_hi; + u64 addr_code_hi, addr_data_hi; u32 i, blocks, addr_args; gk20a_dbg_fn(""); @@ -238,8 +238,6 @@ int gv11b_pmu_bootstrap(struct nvgpu_pmu *pmu) desc->app_resident_data_offset) >> 8); addr_load_lo = u64_lo32((pmu->ucode.gpu_va + desc->bootloader_start_offset) >> 8); - addr_load_hi = u64_hi32((pmu->ucode.gpu_va + - desc->bootloader_start_offset) >> 8); gk20a_writel(g, pwr_falcon_dmemd_r(0), 0x0); gk20a_writel(g, pwr_falcon_dmemd_r(0), 0x0); -- cgit v1.2.2