From aa7ee8dac0cb29ee3244c7eef77eac8e7fc34dba Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Tue, 27 Mar 2018 11:52:27 -0700 Subject: gpu: nvgpu: enhance pbus error reporting -Dump timeout save0 and save1 even if they could be unreliable when fecs_tgt in set in save0 . This is good to have for debug purposes. -Add priv_ring hal for decode_error_code -Decode fecs error code for supported error types Bug 1998067 Change-Id: I60cb6902d099df4a7df45fa624e44d9e0d46360f Signed-off-by: Seema Khowala Reviewed-on: https://git-master.nvidia.com/r/1683014 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/nvgpu/gv11b') diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index ee3fc3de..2d4f82d1 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c @@ -711,6 +711,7 @@ static const struct gpu_ops gv11b_ops = { }, .priv_ring = { .isr = gp10b_priv_ring_isr, + .decode_error_code = gp10b_priv_ring_decode_error_code, }, .fuse = { .check_priv_security = gp10b_fuse_check_priv_security, -- cgit v1.2.2