From 89fbf39a05483917c0a9f3453fd94c724bc37375 Mon Sep 17 00:00:00 2001 From: Alex Waterman Date: Thu, 1 Mar 2018 20:47:25 -0800 Subject: Revert "Revert "gpu: nvgpu: Get coherency on gv100 + NVLINK working"" This reverts commit 5a35a95654d561fce09a3b9abf6b82bb7a29d74b. JIRA EVLR-2333 Change-Id: I923c32496c343d39d34f6d406c38a9f6ce7dc6e0 Signed-off-by: Alex Waterman Reviewed-on: https://git-master.nvidia.com/r/1667167 Reviewed-by: svc-mobile-coverity GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv11b/acr_gv11b.c | 7 +++++-- drivers/gpu/nvgpu/gv11b/css_gr_gv11b.c | 7 ++++--- drivers/gpu/nvgpu/gv11b/dbg_gpu_gv11b.c | 11 ++++++----- drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | 10 ++++++---- drivers/gpu/nvgpu/gv11b/mm_gv11b.c | 6 ++++-- drivers/gpu/nvgpu/gv11b/pmu_gv11b.c | 8 +++++--- drivers/gpu/nvgpu/gv11b/subctx_gv11b.c | 5 +++-- 7 files changed, 33 insertions(+), 21 deletions(-) (limited to 'drivers/gpu/nvgpu/gv11b') diff --git a/drivers/gpu/nvgpu/gv11b/acr_gv11b.c b/drivers/gpu/nvgpu/gv11b/acr_gv11b.c index 799b2db4..4fa3f324 100644 --- a/drivers/gpu/nvgpu/gv11b/acr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/acr_gv11b.c @@ -27,9 +27,10 @@ #include #include #include -#include #include #include +#include +#include #include "gk20a/gk20a.h" #include "acr_gv11b.h" @@ -220,7 +221,9 @@ static int bl_bootstrap(struct nvgpu_pmu *pmu, pwr_pmu_new_instblk_ptr_f( nvgpu_inst_block_addr(g, &mm->pmu.inst_block) >> 12) | pwr_pmu_new_instblk_valid_f(1) | - pwr_pmu_new_instblk_target_sys_ncoh_f()); + (nvgpu_is_enabled(g, NVGPU_USE_COHERENT_SYSMEM) ? + pwr_pmu_new_instblk_target_sys_coh_f() : + pwr_pmu_new_instblk_target_sys_ncoh_f())) ; /*copy bootloader interface structure to dmem*/ nvgpu_flcn_copy_to_dmem(pmu->flcn, 0, (u8 *)pbl_desc, diff --git a/drivers/gpu/nvgpu/gv11b/css_gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/css_gr_gv11b.c index 617ea61d..86977bb3 100644 --- a/drivers/gpu/nvgpu/gv11b/css_gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/css_gr_gv11b.c @@ -31,14 +31,14 @@ #include #include #include +#include +#include +#include #include "gk20a/gk20a.h" #include "gk20a/css_gr_gk20a.h" #include "css_gr_gv11b.h" -#include -#include - #include #include @@ -144,6 +144,7 @@ int gv11b_css_hw_enable_snapshot(struct channel_gk20a *ch, perf_pmasys_mem_block_valid_true_f() | nvgpu_aperture_mask(g, &g->mm.hwpm.inst_block, perf_pmasys_mem_block_target_sys_ncoh_f(), + perf_pmasys_mem_block_target_sys_coh_f(), perf_pmasys_mem_block_target_lfb_f())); diff --git a/drivers/gpu/nvgpu/gv11b/dbg_gpu_gv11b.c b/drivers/gpu/nvgpu/gv11b/dbg_gpu_gv11b.c index e5d88e8c..562476ca 100644 --- a/drivers/gpu/nvgpu/gv11b/dbg_gpu_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/dbg_gpu_gv11b.c @@ -59,11 +59,12 @@ int gv11b_perfbuf_enable_locked(struct gk20a *g, u64 offset, u32 size) inst_pa_page = nvgpu_inst_block_addr(g, &mm->perfbuf.inst_block) >> 12; gk20a_writel(g, perf_pmasys_mem_block_r(), - perf_pmasys_mem_block_base_f(inst_pa_page) | - perf_pmasys_mem_block_valid_true_f() | - nvgpu_aperture_mask(g, &mm->perfbuf.inst_block, -+ perf_pmasys_mem_block_target_sys_ncoh_f(), -+ perf_pmasys_mem_block_target_lfb_f())); + perf_pmasys_mem_block_base_f(inst_pa_page) | + perf_pmasys_mem_block_valid_true_f() | + nvgpu_aperture_mask(g, &mm->perfbuf.inst_block, + perf_pmasys_mem_block_target_sys_ncoh_f(), + perf_pmasys_mem_block_target_sys_coh_f(), + perf_pmasys_mem_block_target_lfb_f())); gk20a_idle(g); return 0; diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c index feed2002..9e60d9f7 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c @@ -101,12 +101,14 @@ void gv11b_get_ch_runlist_entry(struct channel_gk20a *c, u32 *runlist) c->runqueue_sel) | ram_rl_entry_chan_userd_target_f( nvgpu_aperture_mask(g, &g->fifo.userd, - ram_rl_entry_chan_userd_target_sys_mem_ncoh_v(), - ram_rl_entry_chan_userd_target_vid_mem_v())) | + ram_rl_entry_chan_userd_target_sys_mem_ncoh_v(), + ram_rl_entry_chan_userd_target_sys_mem_coh_v(), + ram_rl_entry_chan_userd_target_vid_mem_v())) | ram_rl_entry_chan_inst_target_f( nvgpu_aperture_mask(g, &c->inst_block, - ram_rl_entry_chan_inst_target_sys_mem_ncoh_v(), - ram_rl_entry_chan_inst_target_vid_mem_v())); + ram_rl_entry_chan_inst_target_sys_mem_ncoh_v(), + ram_rl_entry_chan_inst_target_sys_mem_coh_v(), + ram_rl_entry_chan_inst_target_vid_mem_v())); addr_lo = u64_lo32(c->userd_iova) >> ram_rl_entry_chan_userd_ptr_align_shift_v(); diff --git a/drivers/gpu/nvgpu/gv11b/mm_gv11b.c b/drivers/gpu/nvgpu/gv11b/mm_gv11b.c index ade1d9fe..b46ecb0a 100644 --- a/drivers/gpu/nvgpu/gv11b/mm_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/mm_gv11b.c @@ -26,6 +26,7 @@ #include #include #include +#include #include "gk20a/gk20a.h" #include "gk20a/mm_gk20a.h" @@ -292,8 +293,9 @@ int gv11b_init_bar2_mm_hw_setup(struct gk20a *g) gk20a_writel(g, bus_bar2_block_r(), nvgpu_aperture_mask(g, inst_block, - bus_bar2_block_target_sys_mem_ncoh_f(), - bus_bar2_block_target_vid_mem_f()) | + bus_bar2_block_target_sys_mem_ncoh_f(), + bus_bar2_block_target_sys_mem_coh_f(), + bus_bar2_block_target_vid_mem_f()) | bus_bar2_block_mode_virtual_f() | bus_bar2_block_ptr_f(inst_pa)); diff --git a/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c b/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c index 7dd4f8f4..13e70eca 100644 --- a/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c @@ -195,9 +195,11 @@ int gv11b_pmu_bootstrap(struct nvgpu_pmu *pmu) gk20a_writel(g, pwr_pmu_new_instblk_r(), pwr_pmu_new_instblk_ptr_f( - nvgpu_inst_block_addr(g, &mm->pmu.inst_block) >> ALIGN_4KB) - | pwr_pmu_new_instblk_valid_f(1) - | pwr_pmu_new_instblk_target_sys_ncoh_f()); + nvgpu_inst_block_addr(g, &mm->pmu.inst_block) >> ALIGN_4KB) | + pwr_pmu_new_instblk_valid_f(1) | + (nvgpu_is_enabled(g, NVGPU_USE_COHERENT_SYSMEM) ? + pwr_pmu_new_instblk_target_sys_coh_f() : + pwr_pmu_new_instblk_target_sys_ncoh_f())); /* TBD: load all other surfaces */ g->ops.pmu_ver.set_pmu_cmdline_args_trace_size( diff --git a/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c b/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c index 05d7dee0..bda4c8e4 100644 --- a/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c @@ -177,8 +177,9 @@ void gv11b_subctx_commit_pdb(struct vm_gk20a *vm, u32 pdb_addr_lo, pdb_addr_hi; u64 pdb_addr; u32 aperture = nvgpu_aperture_mask(g, vm->pdb.mem, - ram_in_sc_page_dir_base_target_sys_mem_ncoh_v(), - ram_in_sc_page_dir_base_target_vid_mem_v()); + ram_in_sc_page_dir_base_target_sys_mem_ncoh_v(), + ram_in_sc_page_dir_base_target_sys_mem_coh_v(), + ram_in_sc_page_dir_base_target_vid_mem_v()); pdb_addr = nvgpu_mem_get_addr(g, vm->pdb.mem); pdb_addr_lo = u64_lo32(pdb_addr >> ram_in_base_shift_v()); -- cgit v1.2.2