From 7f14aafc2c02eb0fab458324d0ba91a7fdea3086 Mon Sep 17 00:00:00 2001 From: Richard Zhao Date: Tue, 26 Jun 2018 17:37:40 -0700 Subject: gpu: nvgpu: rework ecc structure and sysfs - create common file common/ecc.c which include common functions for add ecc counters and remove counters. - common code will create a list of all counter which make it easier to iterate all counters. - Add chip specific file for adding ecc counters. - add linux specific file os/linux/ecc_sysfs.c to export counters to sysfs. - remove obsolete code - MISRA violation for using snprintf is not solved, tracking with jira NVGPU-859 Jira NVGPUT-115 Change-Id: I1905c43c5c9b2b131199807533dee8e63ddc12f4 Signed-off-by: Richard Zhao Reviewed-on: https://git-master.nvidia.com/r/1763536 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv11b/ecc_gv11b.c | 181 ++++++++++++++++++++++++++++++++++++ drivers/gpu/nvgpu/gv11b/ecc_gv11b.h | 28 ++++++ drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 48 +++++----- drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 6 +- drivers/gpu/nvgpu/gv11b/ltc_gv11b.c | 10 +- drivers/gpu/nvgpu/gv11b/pmu_gv11b.c | 8 +- 6 files changed, 241 insertions(+), 40 deletions(-) create mode 100644 drivers/gpu/nvgpu/gv11b/ecc_gv11b.c create mode 100644 drivers/gpu/nvgpu/gv11b/ecc_gv11b.h (limited to 'drivers/gpu/nvgpu/gv11b') diff --git a/drivers/gpu/nvgpu/gv11b/ecc_gv11b.c b/drivers/gpu/nvgpu/gv11b/ecc_gv11b.c new file mode 100644 index 00000000..6e29bf94 --- /dev/null +++ b/drivers/gpu/nvgpu/gv11b/ecc_gv11b.c @@ -0,0 +1,181 @@ +/* + * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include + +#include "gk20a/gk20a.h" +#include "gv11b/ecc_gv11b.h" + +int gv11b_ecc_init(struct gk20a *g) +{ + int err; + + err = NVGPU_ECC_COUNTER_INIT_PER_TPC(sm_lrf_ecc_single_err_count); + if (err != 0) { + goto done; + } + err = NVGPU_ECC_COUNTER_INIT_PER_TPC(sm_lrf_ecc_double_err_count); + if (err != 0) { + goto done; + } + + err = NVGPU_ECC_COUNTER_INIT_PER_TPC( + sm_l1_tag_ecc_corrected_err_count); + if (err != 0) { + goto done; + } + err = NVGPU_ECC_COUNTER_INIT_PER_TPC( + sm_l1_tag_ecc_uncorrected_err_count); + if (err != 0) { + goto done; + } + + err = NVGPU_ECC_COUNTER_INIT_PER_TPC( + sm_cbu_ecc_corrected_err_count); + if (err != 0) { + goto done; + } + err = NVGPU_ECC_COUNTER_INIT_PER_TPC( + sm_cbu_ecc_uncorrected_err_count); + if (err != 0) { + goto done; + } + + err = NVGPU_ECC_COUNTER_INIT_PER_TPC( + sm_l1_data_ecc_corrected_err_count); + if (err != 0) { + goto done; + } + err = NVGPU_ECC_COUNTER_INIT_PER_TPC( + sm_l1_data_ecc_uncorrected_err_count); + if (err != 0) { + goto done; + } + + err = NVGPU_ECC_COUNTER_INIT_PER_TPC( + sm_icache_ecc_corrected_err_count); + if (err != 0) { + goto done; + } + err = NVGPU_ECC_COUNTER_INIT_PER_TPC( + sm_icache_ecc_uncorrected_err_count); + if (err != 0) { + goto done; + } + + err = NVGPU_ECC_COUNTER_INIT_PER_GPC( + gcc_l15_ecc_corrected_err_count); + if (err != 0) { + goto done; + } + err = NVGPU_ECC_COUNTER_INIT_PER_GPC( + gcc_l15_ecc_uncorrected_err_count); + if (err != 0) { + goto done; + } + + err = NVGPU_ECC_COUNTER_INIT_PER_LTS(ecc_sec_count); + if (err != 0) { + goto done; + } + err = NVGPU_ECC_COUNTER_INIT_PER_LTS(ecc_ded_count); + if (err != 0) { + goto done; + } + + err = NVGPU_ECC_COUNTER_INIT_GR(fecs_ecc_uncorrected_err_count); + if (err != 0) { + goto done; + } + err = NVGPU_ECC_COUNTER_INIT_GR(fecs_ecc_corrected_err_count); + if (err != 0) { + goto done; + } + + err = NVGPU_ECC_COUNTER_INIT_PER_GPC( + gpccs_ecc_uncorrected_err_count); + if (err != 0) { + goto done; + } + err = NVGPU_ECC_COUNTER_INIT_PER_GPC( + gpccs_ecc_corrected_err_count); + if (err != 0) { + goto done; + } + + err = NVGPU_ECC_COUNTER_INIT_PER_GPC( + mmu_l1tlb_ecc_uncorrected_err_count); + if (err != 0) { + goto done; + } + err = NVGPU_ECC_COUNTER_INIT_PER_GPC( + mmu_l1tlb_ecc_corrected_err_count); + if (err != 0) { + goto done; + } + + err = NVGPU_ECC_COUNTER_INIT_FB(mmu_l2tlb_ecc_uncorrected_err_count); + if (err != 0) { + goto done; + } + err = NVGPU_ECC_COUNTER_INIT_FB(mmu_l2tlb_ecc_corrected_err_count); + if (err != 0) { + goto done; + } + + err = NVGPU_ECC_COUNTER_INIT_FB(mmu_hubtlb_ecc_uncorrected_err_count); + if (err != 0) { + goto done; + } + err = NVGPU_ECC_COUNTER_INIT_FB(mmu_hubtlb_ecc_corrected_err_count); + if (err != 0) { + goto done; + } + + err = NVGPU_ECC_COUNTER_INIT_FB( + mmu_fillunit_ecc_uncorrected_err_count); + if (err != 0) { + goto done; + } + err = NVGPU_ECC_COUNTER_INIT_FB( + mmu_fillunit_ecc_corrected_err_count); + if (err != 0) { + goto done; + } + + err = NVGPU_ECC_COUNTER_INIT_PMU(pmu_ecc_uncorrected_err_count); + if (err != 0) { + goto done; + } + err = NVGPU_ECC_COUNTER_INIT_PMU(pmu_ecc_corrected_err_count); + if (err != 0) { + goto done; + } + +done: + if (err != 0) { + nvgpu_err(g, "ecc counter allocate failed, err=%d", err); + nvgpu_ecc_free(g); + } + + return err; +} diff --git a/drivers/gpu/nvgpu/gv11b/ecc_gv11b.h b/drivers/gpu/nvgpu/gv11b/ecc_gv11b.h new file mode 100644 index 00000000..ce0f12b9 --- /dev/null +++ b/drivers/gpu/nvgpu/gv11b/ecc_gv11b.h @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __ECC_GV11B_H__ +#define __ECC_GV11B_H__ + +int gv11b_ecc_init(struct gk20a *g); + +#endif diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index d3fe5f65..c2f47a20 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c @@ -198,7 +198,7 @@ static int gr_gv11b_handle_l1_tag_exception(struct gk20a *g, u32 gpc, u32 tpc, l1_tag_corrected_err_count_delta += (is_l1_tag_ecc_corrected_total_err_overflow << gr_pri_gpc0_tpc0_sm_l1_tag_ecc_corrected_err_count_total_s()); - g->ecc.gr.sm_l1_tag_corrected_err_count.counters[tpc] += + g->ecc.gr.sm_l1_tag_ecc_corrected_err_count[gpc][tpc].counter += l1_tag_corrected_err_count_delta; gk20a_writel(g, gr_pri_gpc0_tpc0_sm_l1_tag_ecc_corrected_err_count_r() + offset, @@ -213,7 +213,7 @@ static int gr_gv11b_handle_l1_tag_exception(struct gk20a *g, u32 gpc, u32 tpc, l1_tag_uncorrected_err_count_delta += (is_l1_tag_ecc_uncorrected_total_err_overflow << gr_pri_gpc0_tpc0_sm_l1_tag_ecc_uncorrected_err_count_total_s()); - g->ecc.gr.sm_l1_tag_uncorrected_err_count.counters[tpc] += + g->ecc.gr.sm_l1_tag_ecc_uncorrected_err_count[gpc][tpc].counter += l1_tag_uncorrected_err_count_delta; gk20a_writel(g, gr_pri_gpc0_tpc0_sm_l1_tag_ecc_uncorrected_err_count_r() + offset, @@ -290,7 +290,7 @@ static int gr_gv11b_handle_lrf_exception(struct gk20a *g, u32 gpc, u32 tpc, lrf_corrected_err_count_delta += (is_lrf_ecc_corrected_total_err_overflow << gr_pri_gpc0_tpc0_sm_lrf_ecc_corrected_err_count_total_s()); - g->ecc.gr.sm_lrf_single_err_count.counters[tpc] += + g->ecc.gr.sm_lrf_ecc_single_err_count[gpc][tpc].counter += lrf_corrected_err_count_delta; gk20a_writel(g, gr_pri_gpc0_tpc0_sm_lrf_ecc_corrected_err_count_r() + offset, @@ -305,7 +305,7 @@ static int gr_gv11b_handle_lrf_exception(struct gk20a *g, u32 gpc, u32 tpc, lrf_uncorrected_err_count_delta += (is_lrf_ecc_uncorrected_total_err_overflow << gr_pri_gpc0_tpc0_sm_lrf_ecc_uncorrected_err_count_total_s()); - g->ecc.gr.sm_lrf_double_err_count.counters[tpc] += + g->ecc.gr.sm_lrf_ecc_double_err_count[gpc][tpc].counter += lrf_uncorrected_err_count_delta; gk20a_writel(g, gr_pri_gpc0_tpc0_sm_lrf_ecc_uncorrected_err_count_r() + offset, @@ -449,7 +449,7 @@ static int gr_gv11b_handle_cbu_exception(struct gk20a *g, u32 gpc, u32 tpc, cbu_corrected_err_count_delta += (is_cbu_ecc_corrected_total_err_overflow << gr_pri_gpc0_tpc0_sm_cbu_ecc_corrected_err_count_total_s()); - g->ecc.gr.sm_cbu_corrected_err_count.counters[tpc] += + g->ecc.gr.sm_cbu_ecc_corrected_err_count[gpc][tpc].counter += cbu_corrected_err_count_delta; gk20a_writel(g, gr_pri_gpc0_tpc0_sm_cbu_ecc_corrected_err_count_r() + offset, @@ -464,7 +464,7 @@ static int gr_gv11b_handle_cbu_exception(struct gk20a *g, u32 gpc, u32 tpc, cbu_uncorrected_err_count_delta += (is_cbu_ecc_uncorrected_total_err_overflow << gr_pri_gpc0_tpc0_sm_cbu_ecc_uncorrected_err_count_total_s()); - g->ecc.gr.sm_cbu_uncorrected_err_count.counters[tpc] += + g->ecc.gr.sm_cbu_ecc_uncorrected_err_count[gpc][tpc].counter += cbu_uncorrected_err_count_delta; gk20a_writel(g, gr_pri_gpc0_tpc0_sm_cbu_ecc_uncorrected_err_count_r() + offset, @@ -529,7 +529,7 @@ static int gr_gv11b_handle_l1_data_exception(struct gk20a *g, u32 gpc, u32 tpc, l1_data_corrected_err_count_delta += (is_l1_data_ecc_corrected_total_err_overflow << gr_pri_gpc0_tpc0_sm_l1_data_ecc_corrected_err_count_total_s()); - g->ecc.gr.sm_l1_data_corrected_err_count.counters[tpc] += + g->ecc.gr.sm_l1_data_ecc_corrected_err_count[gpc][tpc].counter += l1_data_corrected_err_count_delta; gk20a_writel(g, gr_pri_gpc0_tpc0_sm_l1_data_ecc_corrected_err_count_r() + offset, @@ -544,7 +544,7 @@ static int gr_gv11b_handle_l1_data_exception(struct gk20a *g, u32 gpc, u32 tpc, l1_data_uncorrected_err_count_delta += (is_l1_data_ecc_uncorrected_total_err_overflow << gr_pri_gpc0_tpc0_sm_l1_data_ecc_uncorrected_err_count_total_s()); - g->ecc.gr.sm_l1_data_uncorrected_err_count.counters[tpc] += + g->ecc.gr.sm_l1_data_ecc_uncorrected_err_count[gpc][tpc].counter += l1_data_uncorrected_err_count_delta; gk20a_writel(g, gr_pri_gpc0_tpc0_sm_l1_data_ecc_uncorrected_err_count_r() + offset, @@ -613,7 +613,7 @@ static int gr_gv11b_handle_icache_exception(struct gk20a *g, u32 gpc, u32 tpc, icache_corrected_err_count_delta += (is_icache_ecc_corrected_total_err_overflow << gr_pri_gpc0_tpc0_sm_icache_ecc_corrected_err_count_total_s()); - g->ecc.gr.sm_icache_corrected_err_count.counters[tpc] += + g->ecc.gr.sm_icache_ecc_corrected_err_count[gpc][tpc].counter += icache_corrected_err_count_delta; gk20a_writel(g, gr_pri_gpc0_tpc0_sm_icache_ecc_corrected_err_count_r() + offset, @@ -628,7 +628,7 @@ static int gr_gv11b_handle_icache_exception(struct gk20a *g, u32 gpc, u32 tpc, icache_uncorrected_err_count_delta += (is_icache_ecc_uncorrected_total_err_overflow << gr_pri_gpc0_tpc0_sm_icache_ecc_uncorrected_err_count_total_s()); - g->ecc.gr.sm_icache_uncorrected_err_count.counters[tpc] += + g->ecc.gr.sm_icache_ecc_uncorrected_err_count[gpc][tpc].counter += icache_uncorrected_err_count_delta; gk20a_writel(g, gr_pri_gpc0_tpc0_sm_icache_ecc_uncorrected_err_count_r() + offset, @@ -717,7 +717,7 @@ int gr_gv11b_handle_gcc_exception(struct gk20a *g, u32 gpc, u32 tpc, gcc_l15_corrected_err_count_delta += (is_gcc_l15_ecc_corrected_total_err_overflow << gr_pri_gpc0_gcc_l15_ecc_corrected_err_count_total_s()); - g->ecc.gr.gcc_l15_corrected_err_count.counters[gpc] += + g->ecc.gr.gcc_l15_ecc_corrected_err_count[gpc].counter += gcc_l15_corrected_err_count_delta; gk20a_writel(g, gr_pri_gpc0_gcc_l15_ecc_corrected_err_count_r() + offset, @@ -732,7 +732,7 @@ int gr_gv11b_handle_gcc_exception(struct gk20a *g, u32 gpc, u32 tpc, gcc_l15_uncorrected_err_count_delta += (is_gcc_l15_ecc_uncorrected_total_err_overflow << gr_pri_gpc0_gcc_l15_ecc_uncorrected_err_count_total_s()); - g->ecc.gr.gcc_l15_uncorrected_err_count.counters[gpc] += + g->ecc.gr.gcc_l15_ecc_uncorrected_err_count[gpc].counter += gcc_l15_uncorrected_err_count_delta; gk20a_writel(g, gr_pri_gpc0_gcc_l15_ecc_uncorrected_err_count_r() + offset, @@ -802,9 +802,9 @@ static int gr_gv11b_handle_gpcmmu_ecc_exception(struct gk20a *g, u32 gpc, uncorrected_delta += (0x1UL << gr_gpc0_mmu_l1tlb_ecc_uncorrected_err_count_total_s()); - g->ecc.gr.mmu_l1tlb_corrected_err_count.counters[gpc] += + g->ecc.gr.mmu_l1tlb_ecc_corrected_err_count[gpc].counter += corrected_delta; - g->ecc.gr.mmu_l1tlb_uncorrected_err_count.counters[gpc] += + g->ecc.gr.mmu_l1tlb_ecc_uncorrected_err_count[gpc].counter += uncorrected_delta; nvgpu_log(g, gpu_dbg_intr, "mmu l1tlb gpc:%d ecc interrupt intr: 0x%x", gpc, hww_esr); @@ -824,8 +824,8 @@ static int gr_gv11b_handle_gpcmmu_ecc_exception(struct gk20a *g, u32 gpc, "ecc error address: 0x%x", ecc_addr); nvgpu_log(g, gpu_dbg_intr, "ecc error count corrected: %d, uncorrected %d", - g->ecc.gr.mmu_l1tlb_corrected_err_count.counters[gpc], - g->ecc.gr.mmu_l1tlb_uncorrected_err_count.counters[gpc]); + g->ecc.gr.mmu_l1tlb_ecc_corrected_err_count[gpc].counter, + g->ecc.gr.mmu_l1tlb_ecc_uncorrected_err_count[gpc].counter); return ret; } @@ -880,9 +880,9 @@ static int gr_gv11b_handle_gpccs_ecc_exception(struct gk20a *g, u32 gpc, gk20a_writel(g, gr_gpc0_gpccs_falcon_ecc_status_r() + offset, gr_gpc0_gpccs_falcon_ecc_status_reset_task_f()); - g->ecc.gr.gpccs_corrected_err_count.counters[gpc] += + g->ecc.gr.gpccs_ecc_corrected_err_count[gpc].counter += corrected_delta; - g->ecc.gr.gpccs_uncorrected_err_count.counters[gpc] += + g->ecc.gr.gpccs_ecc_uncorrected_err_count[gpc].counter += uncorrected_delta; nvgpu_log(g, gpu_dbg_intr, "gppcs gpc:%d ecc interrupt intr: 0x%x", gpc, hww_esr); @@ -907,8 +907,8 @@ static int gr_gv11b_handle_gpccs_ecc_exception(struct gk20a *g, u32 gpc, nvgpu_log(g, gpu_dbg_intr, "ecc error count corrected: %d, uncorrected %d", - g->ecc.gr.gpccs_corrected_err_count.counters[gpc], - g->ecc.gr.gpccs_uncorrected_err_count.counters[gpc]); + g->ecc.gr.gpccs_ecc_corrected_err_count[gpc].counter, + g->ecc.gr.gpccs_ecc_uncorrected_err_count[gpc].counter); return ret; } @@ -2419,9 +2419,9 @@ static void gr_gv11b_handle_fecs_ecc_error(struct gk20a *g, u32 intr) gk20a_writel(g, gr_fecs_falcon_ecc_status_r(), gr_fecs_falcon_ecc_status_reset_task_f()); - g->ecc.gr.fecs_corrected_err_count.counters[0] += + g->ecc.gr.fecs_ecc_corrected_err_count[0].counter += corrected_delta; - g->ecc.gr.fecs_uncorrected_err_count.counters[0] += + g->ecc.gr.fecs_ecc_uncorrected_err_count[0].counter += uncorrected_delta; nvgpu_log(g, gpu_dbg_intr, @@ -2450,8 +2450,8 @@ static void gr_gv11b_handle_fecs_ecc_error(struct gk20a *g, u32 intr) nvgpu_log(g, gpu_dbg_intr, "ecc error count corrected: %d, uncorrected %d", - g->ecc.gr.fecs_corrected_err_count.counters[0], - g->ecc.gr.fecs_uncorrected_err_count.counters[0]); + g->ecc.gr.fecs_ecc_corrected_err_count[0].counter, + g->ecc.gr.fecs_ecc_uncorrected_err_count[0].counter); } } diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 366d6928..efac772c 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c @@ -84,6 +84,7 @@ #include "regops_gv11b.h" #include "subctx_gv11b.h" #include "therm_gv11b.h" +#include "ecc_gv11b.h" #include #include @@ -369,10 +370,7 @@ static const struct gpu_ops gv11b_ops = { .update_boosted_ctx = gr_gp10b_update_boosted_ctx, .set_bes_crop_debug3 = gr_gp10b_set_bes_crop_debug3, .set_bes_crop_debug4 = gr_gp10b_set_bes_crop_debug4, -#ifdef CONFIG_SYSFS - .create_gr_sysfs = gr_gv11b_create_sysfs, - .remove_gr_sysfs = gr_gv11b_remove_sysfs, -#endif + .init_ecc = gv11b_ecc_init, .set_ctxsw_preemption_mode = gr_gv11b_set_ctxsw_preemption_mode, .is_etpc_addr = gv11b_gr_pri_is_etpc_addr, .egpc_etpc_priv_addr_table = gv11b_gr_egpc_etpc_priv_addr_table, diff --git a/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c b/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c index 48faa4d2..db797bde 100644 --- a/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c @@ -90,13 +90,11 @@ void gv11b_ltc_isr(struct gk20a *g) u32 ecc_status, ecc_addr, corrected_cnt, uncorrected_cnt; u32 corrected_delta, uncorrected_delta; u32 corrected_overflow, uncorrected_overflow; - u32 ltc_corrected, ltc_uncorrected; mc_intr = gk20a_readl(g, mc_intr_ltc_r()); for (ltc = 0; ltc < g->ltc_count; ltc++) { if ((mc_intr & 1U << ltc) == 0) continue; - ltc_corrected = ltc_uncorrected = 0U; for (slice = 0; slice < g->gr.slices_per_ltc; slice++) { u32 offset = ltc_stride * ltc + lts_stride * slice; @@ -150,8 +148,8 @@ void gv11b_ltc_isr(struct gk20a *g) if (uncorrected_overflow) uncorrected_delta += (0x1U << ltc_ltc0_lts0_l2_cache_ecc_uncorrected_err_count_total_s()); - ltc_corrected += corrected_delta; - ltc_uncorrected += uncorrected_delta; + g->ecc.ltc.ecc_sec_count[ltc][slice].counter += corrected_delta; + g->ecc.ltc.ecc_ded_count[ltc][slice].counter += uncorrected_delta; nvgpu_log(g, gpu_dbg_intr, "ltc:%d lts: %d cache ecc interrupt intr: 0x%x", ltc, slice, ltc_intr3); @@ -177,10 +175,6 @@ void gv11b_ltc_isr(struct gk20a *g) } } - g->ecc.ltc.l2_cache_corrected_err_count.counters[ltc] += - ltc_corrected; - g->ecc.ltc.l2_cache_uncorrected_err_count.counters[ltc] += - ltc_uncorrected; } diff --git a/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c b/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c index 3f0e2f22..9a2e9c00 100644 --- a/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c @@ -343,8 +343,8 @@ void gv11b_pmu_handle_ext_irq(struct gk20a *g, u32 intr0) if (uncorrected_overflow) uncorrected_delta += (0x1UL << pwr_pmu_falcon_ecc_uncorrected_err_count_total_s()); - g->ecc.pmu.pmu_corrected_err_count.counters[0] += corrected_delta; - g->ecc.pmu.pmu_uncorrected_err_count.counters[0] += uncorrected_delta; + g->ecc.pmu.pmu_ecc_corrected_err_count[0].counter += corrected_delta; + g->ecc.pmu.pmu_ecc_uncorrected_err_count[0].counter += uncorrected_delta; nvgpu_log(g, gpu_dbg_intr, "pmu ecc interrupt intr1: 0x%x", intr1); @@ -371,8 +371,8 @@ void gv11b_pmu_handle_ext_irq(struct gk20a *g, u32 intr0) nvgpu_log(g, gpu_dbg_intr, "ecc error count corrected: %d, uncorrected %d", - g->ecc.pmu.pmu_corrected_err_count.counters[0], - g->ecc.pmu.pmu_uncorrected_err_count.counters[0]); + g->ecc.pmu.pmu_ecc_corrected_err_count[0].counter, + g->ecc.pmu.pmu_ecc_uncorrected_err_count[0].counter); } } } -- cgit v1.2.2