From 963fac80687c1e7d8941a281cace3ccdcc34fc68 Mon Sep 17 00:00:00 2001 From: Deepak Goyal Date: Thu, 1 Mar 2018 16:27:51 +0530 Subject: gpu: nvgpu: initialize max_subctx_count before use PMU instance block layout is not getting populated with subctx pdb info as max_subctx_count is 0x0 and is getting initialized after PMU instance block initialization gets completed. Therefore initializing max_subctx_count before using it. For Volta, FECS can bind itself with the PMU instance only if SC PDB info is populated. Bug 2051863 Bug 200392620 Change-Id: Id4fc26502e189c15cb57cb36cc09387dad773dc5 Signed-off-by: Deepak Goyal Reviewed-on: https://git-master.nvidia.com/r/1666585 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv11b/subctx_gv11b.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/nvgpu/gv11b/subctx_gv11b.c') diff --git a/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c b/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c index 05d7dee0..12a606bf 100644 --- a/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c @@ -32,6 +32,7 @@ #include #include +#include static void gv11b_subctx_commit_valid_mask(struct vm_gk20a *vm, struct nvgpu_mem *inst_block); @@ -170,12 +171,12 @@ void gv11b_subctx_commit_pdb(struct vm_gk20a *vm, struct nvgpu_mem *inst_block) { struct gk20a *g = gk20a_from_vm(vm); - struct fifo_gk20a *f = &g->fifo; u32 lo, hi; u32 subctx_id = 0; u32 format_word; u32 pdb_addr_lo, pdb_addr_hi; u64 pdb_addr; + u32 max_subctx_count = gr_pri_fe_chip_def_info_max_veid_count_init_v(); u32 aperture = nvgpu_aperture_mask(g, vm->pdb.mem, ram_in_sc_page_dir_base_target_sys_mem_ncoh_v(), ram_in_sc_page_dir_base_target_vid_mem_v()); @@ -194,7 +195,7 @@ void gv11b_subctx_commit_pdb(struct vm_gk20a *vm, ram_in_sc_page_dir_base_lo_0_f(pdb_addr_lo); nvgpu_log(g, gpu_dbg_info, " pdb info lo %x hi %x", format_word, pdb_addr_hi); - for (subctx_id = 0; subctx_id < f->max_subctx_count; subctx_id++) { + for (subctx_id = 0; subctx_id < max_subctx_count; subctx_id++) { lo = ram_in_sc_page_dir_base_vol_0_w() + (4 * subctx_id); hi = ram_in_sc_page_dir_base_hi_0_w() + (4 * subctx_id); nvgpu_mem_wr32(g, inst_block, lo, format_word); -- cgit v1.2.2