From 0d63e22a9920eb1e3d8653665cda650eca2311cd Mon Sep 17 00:00:00 2001 From: seshendra Gadagottu Date: Wed, 27 Sep 2017 11:18:13 -0700 Subject: gpu: nvgpu: gv11b: check for memory aperture type Check for memory aperture type before setting relevant sysmem non-coherent or vidmem flags in ram entry. Modified following functions to correct memory aperture type: gv11b_get_ch_runlist_entry gv11b_subctx_commit_pdb Added following hw constants for chan_inst_target: ram_rl_entry_chan_inst_target_sys_mem_coh_v ram_rl_entry_chan_inst_target_vid_mem_v Change-Id: I85698044b9fe4c8baed71121845e4fb69dc33922 Signed-off-by: seshendra Gadagottu Reviewed-on: https://git-master.nvidia.com/r/1569521 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity Reviewed-by: svccoveritychecker GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gv11b/subctx_gv11b.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gv11b/subctx_gv11b.c') diff --git a/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c b/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c index 84d21a9a..4951d3a4 100644 --- a/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c @@ -158,12 +158,15 @@ void gv11b_subctx_commit_pdb(struct channel_gk20a *c, u32 format_word; u32 pdb_addr_lo, pdb_addr_hi; u64 pdb_addr; + u32 aperture = nvgpu_aperture_mask(g, vm->pdb.mem, + ram_in_sc_page_dir_base_target_sys_mem_ncoh_v(), + ram_in_sc_page_dir_base_target_vid_mem_v()); pdb_addr = nvgpu_mem_get_addr(g, vm->pdb.mem); pdb_addr_lo = u64_lo32(pdb_addr >> ram_in_base_shift_v()); pdb_addr_hi = u64_hi32(pdb_addr); format_word = ram_in_sc_page_dir_base_target_f( - ram_in_sc_page_dir_base_target_sys_mem_ncoh_v(), 0) | + aperture, 0) | ram_in_sc_page_dir_base_vol_f( ram_in_sc_page_dir_base_vol_true_v(), 0) | ram_in_sc_page_dir_base_fault_replay_tex_f(1, 0) | -- cgit v1.2.2