From 07d3387ceb10cdc4d4413d04b1223cbd5181438b Mon Sep 17 00:00:00 2001 From: Srirangan Date: Mon, 20 Aug 2018 16:09:12 +0530 Subject: gpu: nvgpu: gv11b: Fix MISRA 15.6 violations MISRA Rule-15.6 requires that all if-else blocks be enclosed in braces, including single statement blocks. Fix errors due to single statement if blocks without braces, introducing the braces. JIRA NVGPU-671 Change-Id: I1562bd1b109a100af29bd147ed8b56463b6a8e63 Signed-off-by: Srirangan Reviewed-on: https://git-master.nvidia.com/r/1796674 Reviewed-by: svc-misra-checker Reviewed-by: Scott Long GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv11b/subctx_gv11b.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gv11b/subctx_gv11b.c') diff --git a/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c b/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c index f0cf920c..d742e8dc 100644 --- a/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c @@ -105,8 +105,9 @@ int gv11b_update_subctx_header(struct channel_gk20a *c, u64 gpu_va) struct nvgpu_gr_ctx *gr_ctx; tsg = tsg_gk20a_from_ch(c); - if (!tsg) + if (!tsg) { return -EINVAL; + } gr_ctx = &tsg->gr_ctx; -- cgit v1.2.2