From 27694ca572c4d7698b107c6713f0f0604b41c186 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Fri, 25 May 2018 10:27:10 -0700 Subject: gpu: nvgpu: Implement bus HAL for bar2 bind Implement BAR2 bind as a bus HAL and remove the corresponding MM HAL. BAR2 bind HW API is in bus. JIRA NVGPU-588 Change-Id: I3a8391b00f1ba65f9ed28b633f1d52bf7c984230 Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1730896 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv11b/mm_gv11b.h | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gv11b/mm_gv11b.h') diff --git a/drivers/gpu/nvgpu/gv11b/mm_gv11b.h b/drivers/gpu/nvgpu/gv11b/mm_gv11b.h index 2b3ebf4e..f5f89d94 100644 --- a/drivers/gpu/nvgpu/gv11b/mm_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/mm_gv11b.h @@ -34,7 +34,6 @@ void gv11b_init_inst_block(struct nvgpu_mem *inst_block, bool gv11b_mm_mmu_fault_pending(struct gk20a *g); void gv11b_mm_remove_bar2_vm(struct gk20a *g); int gv11b_init_mm_setup_hw(struct gk20a *g); -int gv11b_init_bar2_mm_hw_setup(struct gk20a *g); void gv11b_mm_l2_flush(struct gk20a *g, bool invalidate); u64 gv11b_gpu_phys_addr(struct gk20a *g, struct nvgpu_gmmu_attrs *attrs, u64 phys); -- cgit v1.2.2