From d5fe11091b6d74016e482d9c41580924cc70f520 Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Fri, 10 Mar 2017 12:18:40 -0800 Subject: gpu: nvgpu: gv11b: fix stall interrupt enablement Currently priv, pbus and ltc interrupts are enabled as non-stall but being handled in stall isr. Fix is to configure them as stall interrupt. Change-Id: I86adc04f480d5f4befe7e9255b582ce13fa4efc1 Signed-off-by: Seema Khowala Reviewed-on: http://git-master/r/1319018 Reviewed-by: svccoveritychecker Reviewed-by: Seshendra Gadagottu GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gv11b/mc_gv11b.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'drivers/gpu/nvgpu/gv11b/mc_gv11b.c') diff --git a/drivers/gpu/nvgpu/gv11b/mc_gv11b.c b/drivers/gpu/nvgpu/gv11b/mc_gv11b.c index 65aad786..83c03029 100644 --- a/drivers/gpu/nvgpu/gv11b/mc_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/mc_gv11b.c @@ -30,8 +30,11 @@ static void mc_gv11b_intr_enable(struct gk20a *g) gk20a_writel(g, mc_intr_en_clear_r(NVGPU_MC_INTR_STALLING), 0xffffffff); g->ops.mc.intr_mask_restore[NVGPU_MC_INTR_STALLING] = - mc_intr_pfifo_pending_f() - | eng_intr_mask; + mc_intr_pfifo_pending_f() | + mc_intr_priv_ring_pending_f() | + mc_intr_pbus_pending_f() | + mc_intr_ltc_pending_f() | + eng_intr_mask; gk20a_writel(g, mc_intr_en_set_r(NVGPU_MC_INTR_STALLING), g->ops.mc.intr_mask_restore[NVGPU_MC_INTR_STALLING]); @@ -39,9 +42,6 @@ static void mc_gv11b_intr_enable(struct gk20a *g) 0xffffffff); g->ops.mc.intr_mask_restore[NVGPU_MC_INTR_NONSTALLING] = mc_intr_pfifo_pending_f() - | mc_intr_priv_ring_pending_f() - | mc_intr_ltc_pending_f() - | mc_intr_pbus_pending_f() | eng_intr_mask; gk20a_writel(g, mc_intr_en_set_r(NVGPU_MC_INTR_NONSTALLING), g->ops.mc.intr_mask_restore[NVGPU_MC_INTR_NONSTALLING]); -- cgit v1.2.2