From ac98827c9d81746020dce689f9eb8c4018a8c148 Mon Sep 17 00:00:00 2001 From: Vinod G Date: Tue, 26 Jun 2018 18:09:57 -0700 Subject: gpu: nvgpu: Add L2 register read-backs following writes LTC register write is followed by a register read and if data doesn't match code will report the error. Renamed existing nvgpu_writel_check function as nvgpu_writel_loop as it loops until the write get success. nvgpu_writel_check function write and read back and compare the data. Bug 2039150 Change-Id: I0a49be36aad23936f2d58aa82872710827da1d32 Signed-off-by: Vinod G Reviewed-on: https://git-master.nvidia.com/r/1762344 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv11b/ltc_gv11b.c | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) (limited to 'drivers/gpu/nvgpu/gv11b/ltc_gv11b.c') diff --git a/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c b/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c index b64faaa6..48faa4d2 100644 --- a/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c @@ -42,13 +42,12 @@ void gv11b_ltc_set_zbc_stencil_entry(struct gk20a *g, { u32 real_index = index + GK20A_STARTOF_ZBC_TABLE; - gk20a_writel(g, ltc_ltcs_ltss_dstg_zbc_index_r(), + nvgpu_writel_check(g, ltc_ltcs_ltss_dstg_zbc_index_r(), ltc_ltcs_ltss_dstg_zbc_index_address_f(real_index)); - gk20a_writel(g, ltc_ltcs_ltss_dstg_zbc_stencil_clear_value_r(), - stencil_val->depth); - - gk20a_readl(g, ltc_ltcs_ltss_dstg_zbc_index_r()); + nvgpu_writel_check(g, + ltc_ltcs_ltss_dstg_zbc_stencil_clear_value_r(), + stencil_val->depth); } void gv11b_ltc_init_fs_state(struct gk20a *g) @@ -72,13 +71,13 @@ void gv11b_ltc_init_fs_state(struct gk20a *g) reg = gk20a_readl(g, ltc_ltcs_ltss_intr_r()); reg &= ~ltc_ltcs_ltss_intr_en_evicted_cb_m(); reg &= ~ltc_ltcs_ltss_intr_en_illegal_compstat_access_m(); - gk20a_writel(g, ltc_ltcs_ltss_intr_r(), reg); + nvgpu_writel_check(g, ltc_ltcs_ltss_intr_r(), reg); /* Enable ECC interrupts */ ltc_intr = gk20a_readl(g, ltc_ltcs_ltss_intr_r()); ltc_intr |= ltc_ltcs_ltss_intr_en_ecc_sec_error_enabled_f() | ltc_ltcs_ltss_intr_en_ecc_ded_error_enabled_f(); - gk20a_writel(g, ltc_ltcs_ltss_intr_r(), + nvgpu_writel_check(g, ltc_ltcs_ltss_intr_r(), ltc_intr); } @@ -133,14 +132,16 @@ void gv11b_ltc_isr(struct gk20a *g) /* clear the interrupt */ if ((corrected_delta > 0U) || corrected_overflow) { - gk20a_writel(g, ltc_ltc0_lts0_l2_cache_ecc_corrected_err_count_r() + offset, 0); + nvgpu_writel_check(g, + ltc_ltc0_lts0_l2_cache_ecc_corrected_err_count_r() + offset, 0); } if ((uncorrected_delta > 0U) || uncorrected_overflow) { - gk20a_writel(g, + nvgpu_writel_check(g, ltc_ltc0_lts0_l2_cache_ecc_uncorrected_err_count_r() + offset, 0); } - gk20a_writel(g, ltc_ltc0_lts0_l2_cache_ecc_status_r() + offset, + nvgpu_writel_check(g, + ltc_ltc0_lts0_l2_cache_ecc_status_r() + offset, ltc_ltc0_lts0_l2_cache_ecc_status_reset_task_f()); /* update counters per slice */ -- cgit v1.2.2