From 8fdf40a849f19dc2f00aacce976ed2e22dbb08f4 Mon Sep 17 00:00:00 2001
From: seshendra Gadagottu <sgadagottu@nvidia.com>
Date: Tue, 13 Sep 2016 13:08:01 -0700
Subject: gpu: gv11b: create modified runlist

Create gv11b runlist for channel and tsg in the new
specified way. Also set runlist entry size for gv11b.

Bug 1735760

Change-Id: Ifd421cd71180e9d02303f4cfc92a59fd74d6d893
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1220258
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
---
 drivers/gpu/nvgpu/gv11b/hw_ram_gv11b.h | 46 +++++++++++++++++-----------------
 1 file changed, 23 insertions(+), 23 deletions(-)

(limited to 'drivers/gpu/nvgpu/gv11b/hw_ram_gv11b.h')

diff --git a/drivers/gpu/nvgpu/gv11b/hw_ram_gv11b.h b/drivers/gpu/nvgpu/gv11b/hw_ram_gv11b.h
index c6f51acb..9cd2096a 100644
--- a/drivers/gpu/nvgpu/gv11b/hw_ram_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/hw_ram_gv11b.h
@@ -462,7 +462,7 @@ static inline u32 ram_rl_entry_chan_inst_target_f(u32 v)
 {
 	return (v & 0x3) << 4;
 }
-static inline u32 ram_rl_entry_chan_inst_target_target_sys_mem_ncoh_v(void)
+static inline u32 ram_rl_entry_chan_inst_target_sys_mem_ncoh_v(void)
 {
 	return 0x00000003;
 }
@@ -470,19 +470,19 @@ static inline u32 ram_rl_entry_chan_userd_target_f(u32 v)
 {
 	return (v & 0x3) << 6;
 }
-static inline u32 ram_rl_entry_chan_userd_target_target_vid_mem_v(void)
+static inline u32 ram_rl_entry_chan_userd_target_vid_mem_v(void)
 {
 	return 0x00000000;
 }
-static inline u32 ram_rl_entry_chan_userd_target_target_vid_mem_nvlink_coh_v(void)
+static inline u32 ram_rl_entry_chan_userd_target_vid_mem_nvlink_coh_v(void)
 {
 	return 0x00000001;
 }
-static inline u32 ram_rl_entry_chan_userd_target_target_sys_mem_coh_v(void)
+static inline u32 ram_rl_entry_chan_userd_target_sys_mem_coh_v(void)
 {
 	return 0x00000002;
 }
-static inline u32 ram_rl_entry_chan_userd_target_target_sys_mem_ncoh_v(void)
+static inline u32 ram_rl_entry_chan_userd_target_sys_mem_ncoh_v(void)
 {
 	return 0x00000003;
 }
@@ -494,18 +494,6 @@ static inline u32 ram_rl_entry_chan_userd_ptr_hi_f(u32 v)
 {
 	return (v & 0xffffffff) << 0;
 }
-static inline u32 ram_rl_entry_chan_userd_ptr_hi_entry_chan_inst_ptr_align_shift_v(void)
-{
-	return 0x0000000c;
-}
-static inline u32 ram_rl_entry_chan_userd_ptr_hi_entry_chan_userd_ptr_align_shift_v(void)
-{
-	return 0x00000008;
-}
-static inline u32 ram_rl_entry_chan_userd_ptr_hi_entry_chan_userd_align_shift_v(void)
-{
-	return 0x00000008;
-}
 static inline u32 ram_rl_entry_chid_f(u32 v)
 {
 	return (v & 0xfff) << 0;
@@ -526,7 +514,7 @@ static inline u32 ram_rl_entry_tsg_timeslice_scale_f(u32 v)
 {
 	return (v & 0xf) << 16;
 }
-static inline u32 ram_rl_entry_tsg_timeslice_scale_entry_tsg_timeslice_scale_3_v(void)
+static inline u32 ram_rl_entry_tsg_timeslice_scale_3_v(void)
 {
 	return 0x00000003;
 }
@@ -534,11 +522,11 @@ static inline u32 ram_rl_entry_tsg_timeslice_timeout_f(u32 v)
 {
 	return (v & 0xff) << 24;
 }
-static inline u32 ram_rl_entry_tsg_timeslice_timeout_entry_tsg_timeslice_timeout_128_v(void)
+static inline u32 ram_rl_entry_tsg_timeslice_timeout_128_v(void)
 {
 	return 0x00000080;
 }
-static inline u32 ram_rl_entry_tsg_timeslice_timeout_entry_tsg_timeslice_timeout_disable_v(void)
+static inline u32 ram_rl_entry_tsg_timeslice_timeout_disable_v(void)
 {
 	return 0x00000000;
 }
@@ -546,15 +534,15 @@ static inline u32 ram_rl_entry_tsg_length_f(u32 v)
 {
 	return (v & 0xff) << 0;
 }
-static inline u32 ram_rl_entry_tsg_length_entry_tsg_length_init_v(void)
+static inline u32 ram_rl_entry_tsg_length_init_v(void)
 {
 	return 0x00000000;
 }
-static inline u32 ram_rl_entry_tsg_length_entry_tsg_length_min_v(void)
+static inline u32 ram_rl_entry_tsg_length_min_v(void)
 {
 	return 0x00000001;
 }
-static inline u32 ram_rl_entry_tsg_length_entry_tsg_length_max_v(void)
+static inline u32 ram_rl_entry_tsg_length_max_v(void)
 {
 	return 0x00000080;
 }
@@ -562,4 +550,16 @@ static inline u32 ram_rl_entry_tsg_tsgid_f(u32 v)
 {
 	return (v & 0xfff) << 0;
 }
+static inline u32 ram_rl_entry_chan_inst_ptr_align_shift_v(void)
+{
+	return 0x0000000c;
+}
+static inline u32 ram_rl_entry_chan_userd_ptr_align_shift_v(void)
+{
+	return 0x00000008;
+}
+static inline u32 ram_rl_entry_chan_userd_align_shift_v(void)
+{
+	return 0x00000008;
+}
 #endif
-- 
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