From 18e060227da92e4df8f2e5400fec7f6d7bdaad4a Mon Sep 17 00:00:00 2001 From: Seshendra Gadagottu Date: Tue, 28 Aug 2018 14:00:00 -0700 Subject: Revert "Revert "gpu: nvgpu: gv11b: fix PMA list alignment in ctxsw buffer"" This reverts commit d029ad5d8d39e7f153b43ca9d60c0ed1f23c8037. Bug 200441252 Change-Id: I1fe7cd1c9446d6572711b050e946b03605acf422 Signed-off-by: Seshendra Gadagottu Reviewed-on: https://git-master.nvidia.com/r/1808563 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gv11b/hal_gv11b.c') diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index a728d989..a295f774 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c @@ -409,7 +409,7 @@ static const struct gpu_ops gv11b_ops = { .handle_notify_pending = gk20a_gr_handle_notify_pending, .handle_semaphore_pending = gk20a_gr_handle_semaphore_pending, .add_ctxsw_reg_pm_fbpa = gr_gk20a_add_ctxsw_reg_pm_fbpa, - .add_ctxsw_reg_perf_pma = gr_gk20a_add_ctxsw_reg_perf_pma, + .add_ctxsw_reg_perf_pma = gr_gv100_add_ctxsw_reg_perf_pma, .decode_priv_addr = gr_gv11b_decode_priv_addr, .create_priv_addr_table = gr_gv11b_create_priv_addr_table, .get_pmm_per_chiplet_offset = -- cgit v1.2.2