From 35969806d2c763d4a5662ba6a9233a63aa00352d Mon Sep 17 00:00:00 2001 From: seshendra Gadagottu Date: Fri, 2 Dec 2016 10:45:09 -0800 Subject: gpu: nvgpu: gv11b: add clock gating prod settings JIRA GV11B-15 Change-Id: I38d8cbda33f9c4e8b44ca227cd5ea5fef346bfbd Signed-off-by: seshendra Gadagottu Reviewed-on: http://git-master/r/1266705 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c | 648 +++++++++++++++++++++++++ 1 file changed, 648 insertions(+) create mode 100644 drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c (limited to 'drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c') diff --git a/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c b/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c new file mode 100644 index 00000000..9bd40eff --- /dev/null +++ b/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c @@ -0,0 +1,648 @@ +/* + * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + * + * This file is autogenerated. Do not edit. + */ + +#ifndef __gv11b_gating_reglist_h__ +#define __gv11b_gating_reglist_h__ + +#include +#include "gv11b_gating_reglist.h" + +struct gating_desc { + u32 addr; + u32 prod; + u32 disable; +}; +/* slcg bus */ +static const struct gating_desc gv11b_slcg_bus[] = { + {.addr = 0x00001c04, .prod = 0x00000000, .disable = 0x000003fe}, +}; + +/* slcg ce2 */ +static const struct gating_desc gv11b_slcg_ce2[] = { + {.addr = 0x00104204, .prod = 0x00000000, .disable = 0x000007fe}, +}; + +/* slcg chiplet */ +static const struct gating_desc gv11b_slcg_chiplet[] = { + {.addr = 0x0010c07c, .prod = 0x00000000, .disable = 0x00000007}, + {.addr = 0x0010e07c, .prod = 0x00000000, .disable = 0x00000007}, + {.addr = 0x0010d07c, .prod = 0x00000000, .disable = 0x00000007}, + {.addr = 0x0010e17c, .prod = 0x00000000, .disable = 0x00000007}, +}; + +/* slcg fb */ +static const struct gating_desc gv11b_slcg_fb[] = { + {.addr = 0x00100d14, .prod = 0x00000000, .disable = 0xfffffffe}, + {.addr = 0x00100c9c, .prod = 0x00000000, .disable = 0x000001fe}, + {.addr = 0x001facb4, .prod = 0x00000000, .disable = 0x000001fe}, +}; + +/* slcg fifo */ +static const struct gating_desc gv11b_slcg_fifo[] = { + {.addr = 0x000026ec, .prod = 0x00000000, .disable = 0x0001fffe}, +}; + +/* slcg gr */ +static const struct gating_desc gv11b_slcg_gr[] = { + {.addr = 0x004041f4, .prod = 0x00000000, .disable = 0x07fffffe}, + {.addr = 0x0040917c, .prod = 0x00020008, .disable = 0x0003fffe}, + {.addr = 0x00409894, .prod = 0x00000000, .disable = 0x0000fffe}, + {.addr = 0x004078c4, .prod = 0x00000000, .disable = 0x000001fe}, + {.addr = 0x00406004, .prod = 0x00000000, .disable = 0x0001fffe}, + {.addr = 0x00405864, .prod = 0x00000000, .disable = 0x000001fe}, + {.addr = 0x00405910, .prod = 0xfffffff0, .disable = 0xfffffffe}, + {.addr = 0x00408044, .prod = 0x00000000, .disable = 0x000007fe}, + {.addr = 0x00407004, .prod = 0x00000000, .disable = 0x000001fe}, + {.addr = 0x00405bf4, .prod = 0x00000000, .disable = 0x00000002}, + {.addr = 0x0041a17c, .prod = 0x00020008, .disable = 0x0003fffe}, + {.addr = 0x0041a894, .prod = 0x00000000, .disable = 0x0000fffe}, + {.addr = 0x00418504, .prod = 0x00000000, .disable = 0x0007fffe}, + {.addr = 0x0041860c, .prod = 0x00000000, .disable = 0x000001fe}, + {.addr = 0x0041868c, .prod = 0x00000000, .disable = 0x0000001e}, + {.addr = 0x0041871c, .prod = 0x00000000, .disable = 0x000003fe}, + {.addr = 0x00418388, .prod = 0x00000000, .disable = 0x00000001}, + {.addr = 0x0041882c, .prod = 0x00000000, .disable = 0x0001fffe}, + {.addr = 0x00418bc0, .prod = 0x00000000, .disable = 0x000001fe}, + {.addr = 0x00418974, .prod = 0x00000000, .disable = 0x0001fffe}, + {.addr = 0x00418c74, .prod = 0xffffff80, .disable = 0xfffffffe}, + {.addr = 0x00418cf4, .prod = 0xfffffff8, .disable = 0xfffffffe}, + {.addr = 0x00418d74, .prod = 0xffffffe0, .disable = 0xfffffffe}, + {.addr = 0x00418f10, .prod = 0xffffffe0, .disable = 0xfffffffe}, + {.addr = 0x00418e10, .prod = 0xfffffffe, .disable = 0xfffffffe}, + {.addr = 0x00419024, .prod = 0x000001fe, .disable = 0x000001fe}, + {.addr = 0x0041889c, .prod = 0x00000000, .disable = 0x000001fe}, + {.addr = 0x00419d24, .prod = 0x00000000, .disable = 0x000000ff}, + {.addr = 0x0041986c, .prod = 0x00000104, .disable = 0x00fffffe}, + {.addr = 0x00419c74, .prod = 0x0000001e, .disable = 0x0000001e}, + {.addr = 0x00419c84, .prod = 0x0003fffe, .disable = 0x0003fffe}, + {.addr = 0x00419c8c, .prod = 0xffffff84, .disable = 0xfffffffe}, + {.addr = 0x00419c94, .prod = 0x00007ffe, .disable = 0x00007ffe}, + {.addr = 0x00419ca4, .prod = 0x00003ffe, .disable = 0x00003ffe}, + {.addr = 0x00419cac, .prod = 0x0001fffe, .disable = 0x0001fffe}, + {.addr = 0x00419a44, .prod = 0x00000000, .disable = 0x0000000e}, + {.addr = 0x00419a4c, .prod = 0x00000000, .disable = 0x000001fe}, + {.addr = 0x00419a54, .prod = 0x00000000, .disable = 0x0000003e}, + {.addr = 0x00419a5c, .prod = 0x00000000, .disable = 0x0000000e}, + {.addr = 0x00419a64, .prod = 0x00000000, .disable = 0x000001fe}, + {.addr = 0x00419a7c, .prod = 0x00000000, .disable = 0x0000003e}, + {.addr = 0x00419a84, .prod = 0x00000000, .disable = 0x0000000e}, + {.addr = 0x0041be2c, .prod = 0x04115fc0, .disable = 0xfffffffe}, + {.addr = 0x0041bfec, .prod = 0xfffffff0, .disable = 0xfffffffe}, + {.addr = 0x0041bed4, .prod = 0xfffffff8, .disable = 0xfffffffe}, + {.addr = 0x00408814, .prod = 0x00000000, .disable = 0x0001fffe}, + {.addr = 0x00408a84, .prod = 0x00000000, .disable = 0x0001fffe}, + {.addr = 0x004089ac, .prod = 0x00000000, .disable = 0x0001fffe}, + {.addr = 0x00408a24, .prod = 0x00000000, .disable = 0x000000ff}, +}; + +/* slcg ltc */ +static const struct gating_desc gv11b_slcg_ltc[] = { + {.addr = 0x0017e050, .prod = 0x00000000, .disable = 0xfffffffe}, + {.addr = 0x0017e35c, .prod = 0x00000000, .disable = 0xfffffffe}, +}; + +/* slcg perf */ +static const struct gating_desc gv11b_slcg_perf[] = { + {.addr = 0x00248018, .prod = 0xffffffff, .disable = 0x00000000}, + {.addr = 0x00248018, .prod = 0xffffffff, .disable = 0x00000000}, + {.addr = 0x00246018, .prod = 0xffffffff, .disable = 0x00000000}, + {.addr = 0x00246018, .prod = 0xffffffff, .disable = 0x00000000}, + {.addr = 0x00246018, .prod = 0xffffffff, .disable = 0x00000000}, + {.addr = 0x00244018, .prod = 0xffffffff, .disable = 0x00000000}, + {.addr = 0x00244018, .prod = 0xffffffff, .disable = 0x00000000}, + {.addr = 0x00244018, .prod = 0xffffffff, .disable = 0x00000000}, + {.addr = 0x0024a124, .prod = 0x00000001, .disable = 0x00000000}, +}; + +/* slcg PriRing */ +static const struct gating_desc gv11b_slcg_priring[] = { + {.addr = 0x001200a8, .prod = 0x00000000, .disable = 0x00000001}, +}; + +/* slcg pwr_csb */ +static const struct gating_desc gv11b_slcg_pwr_csb[] = { + {.addr = 0x00000134, .prod = 0x00020008, .disable = 0x0003fffe}, + {.addr = 0x00000e74, .prod = 0x00000000, .disable = 0x0000000f}, + {.addr = 0x00000a74, .prod = 0x00000000, .disable = 0x00007ffe}, + {.addr = 0x000016b8, .prod = 0x00000000, .disable = 0x0000000f}, +}; + +/* slcg pmu */ +static const struct gating_desc gv11b_slcg_pmu[] = { + {.addr = 0x0010a134, .prod = 0x00020008, .disable = 0x0003fffe}, + {.addr = 0x0010aa74, .prod = 0x00000000, .disable = 0x00007ffe}, + {.addr = 0x0010ae74, .prod = 0x00000000, .disable = 0x0000000f}, +}; + +/* therm gr */ +static const struct gating_desc gv11b_slcg_therm[] = { + {.addr = 0x000206b8, .prod = 0x00000000, .disable = 0x0000000f}, +}; + +/* slcg Xbar */ +static const struct gating_desc gv11b_slcg_xbar[] = { + {.addr = 0x0013c824, .prod = 0x00000000, .disable = 0x7ffffffe}, + {.addr = 0x0013dc08, .prod = 0x00000000, .disable = 0xfffffffe}, + {.addr = 0x0013c924, .prod = 0x00000000, .disable = 0x7ffffffe}, + {.addr = 0x0013cbe4, .prod = 0x00000000, .disable = 0x1ffffffe}, + {.addr = 0x0013cc04, .prod = 0x00000000, .disable = 0x1ffffffe}, +}; + +/* blcg bus */ +static const struct gating_desc gv11b_blcg_bus[] = { + {.addr = 0x00001c00, .prod = 0x00000042, .disable = 0x00000000}, +}; + +/* blcg ce */ +static const struct gating_desc gv11b_blcg_ce[] = { + {.addr = 0x00104200, .prod = 0x0000c242, .disable = 0x00000000}, +}; + +/* blcg ctxsw prog */ +static const struct gating_desc gv11b_blcg_ctxsw_prog[] = { +}; + +/* blcg fb */ +static const struct gating_desc gv11b_blcg_fb[] = { + {.addr = 0x00100d10, .prod = 0x0000c242, .disable = 0x00000000}, + {.addr = 0x00100d30, .prod = 0x0000c242, .disable = 0x00000000}, + {.addr = 0x00100d3c, .prod = 0x00000242, .disable = 0x00000000}, + {.addr = 0x00100d48, .prod = 0x0000c242, .disable = 0x00000000}, + {.addr = 0x00100d1c, .prod = 0x00000042, .disable = 0x00000000}, + {.addr = 0x00100c98, .prod = 0x00004242, .disable = 0x00000000}, + {.addr = 0x001facb0, .prod = 0x00004242, .disable = 0x00000000}, +}; + +/* blcg fifo */ +static const struct gating_desc gv11b_blcg_fifo[] = { + {.addr = 0x000026e0, .prod = 0x0000c242, .disable = 0x00000000}, +}; + +/* blcg gr */ +static const struct gating_desc gv11b_blcg_gr[] = { + {.addr = 0x004041f0, .prod = 0x0000c646, .disable = 0x00000000}, + {.addr = 0x00409890, .prod = 0x0000007f, .disable = 0x00000000}, + {.addr = 0x004098b0, .prod = 0x0000007f, .disable = 0x00000000}, + {.addr = 0x004078c0, .prod = 0x00004242, .disable = 0x00000000}, + {.addr = 0x00406000, .prod = 0x0000c444, .disable = 0x00000000}, + {.addr = 0x00405860, .prod = 0x0000c242, .disable = 0x00000000}, + {.addr = 0x0040590c, .prod = 0x0000c444, .disable = 0x00000000}, + {.addr = 0x00408040, .prod = 0x0000c444, .disable = 0x00000000}, + {.addr = 0x00407000, .prod = 0x4000c242, .disable = 0x00000000}, + {.addr = 0x00405bf0, .prod = 0x0000c444, .disable = 0x00000000}, + {.addr = 0x0041a890, .prod = 0x0000427f, .disable = 0x00000000}, + {.addr = 0x0041a8b0, .prod = 0x0000007f, .disable = 0x00000000}, + {.addr = 0x00418500, .prod = 0x0000c244, .disable = 0x00000000}, + {.addr = 0x00418608, .prod = 0x0000c242, .disable = 0x00000000}, + {.addr = 0x00418688, .prod = 0x0000c242, .disable = 0x00000000}, + {.addr = 0x00418718, .prod = 0x00000042, .disable = 0x00000000}, + {.addr = 0x00418828, .prod = 0x00008444, .disable = 0x00000000}, + {.addr = 0x00418bbc, .prod = 0x0000c242, .disable = 0x00000000}, + {.addr = 0x00418970, .prod = 0x0000c242, .disable = 0x00000000}, + {.addr = 0x00418c70, .prod = 0x0000c444, .disable = 0x00000000}, + {.addr = 0x00418cf0, .prod = 0x0000c444, .disable = 0x00000000}, + {.addr = 0x00418d70, .prod = 0x0000c444, .disable = 0x00000000}, + {.addr = 0x00418f0c, .prod = 0x0000c444, .disable = 0x00000000}, + {.addr = 0x00418e0c, .prod = 0x0000c444, .disable = 0x00000000}, + {.addr = 0x00419020, .prod = 0x0000c242, .disable = 0x00000000}, + {.addr = 0x00419038, .prod = 0x00000042, .disable = 0x00000000}, + {.addr = 0x00418898, .prod = 0x00004242, .disable = 0x00000000}, + {.addr = 0x00419868, .prod = 0x00008242, .disable = 0x00000000}, + {.addr = 0x00419c70, .prod = 0x0000c444, .disable = 0x00000000}, + {.addr = 0x00419c80, .prod = 0x00000003, .disable = 0x00000000}, + {.addr = 0x00419c88, .prod = 0x00000003, .disable = 0x00000000}, + {.addr = 0x00419c90, .prod = 0x00000003, .disable = 0x00000000}, + {.addr = 0x00419c98, .prod = 0x00000042, .disable = 0x00000000}, + {.addr = 0x00419ca0, .prod = 0x00000043, .disable = 0x00000000}, + {.addr = 0x00419ca8, .prod = 0x00000003, .disable = 0x00000000}, + {.addr = 0x00419cb0, .prod = 0x00000002, .disable = 0x00000000}, + {.addr = 0x00419a40, .prod = 0x00000202, .disable = 0x00000000}, + {.addr = 0x00419a48, .prod = 0x00000202, .disable = 0x00000000}, + {.addr = 0x00419a50, .prod = 0x00000202, .disable = 0x00000000}, + {.addr = 0x00419a58, .prod = 0x00000202, .disable = 0x00000000}, + {.addr = 0x00419a60, .prod = 0x00000202, .disable = 0x00000000}, + {.addr = 0x00419a68, .prod = 0x00000202, .disable = 0x00000000}, + {.addr = 0x00419a78, .prod = 0x00000202, .disable = 0x00000000}, + {.addr = 0x00419a80, .prod = 0x00000202, .disable = 0x00000000}, + {.addr = 0x0041be28, .prod = 0x00008242, .disable = 0x00000000}, + {.addr = 0x0041bfe8, .prod = 0x0000c444, .disable = 0x00000000}, + {.addr = 0x0041bed0, .prod = 0x0000c444, .disable = 0x00000000}, + {.addr = 0x00408810, .prod = 0x0000c242, .disable = 0x00000000}, + {.addr = 0x00408a80, .prod = 0x0000c242, .disable = 0x00000000}, + {.addr = 0x004089a8, .prod = 0x0000c242, .disable = 0x00000000}, +}; + +/* blcg ltc */ +static const struct gating_desc gv11b_blcg_ltc[] = { + {.addr = 0x0017e030, .prod = 0x00000044, .disable = 0x00000000}, + {.addr = 0x0017e040, .prod = 0x00000044, .disable = 0x00000000}, + {.addr = 0x0017e3e0, .prod = 0x00000044, .disable = 0x00000000}, + {.addr = 0x0017e3c8, .prod = 0x00000044, .disable = 0x00000000}, +}; + +/* blcg pwr_csb */ +static const struct gating_desc gv11b_blcg_pwr_csb[] = { + {.addr = 0x00000a70, .prod = 0x00000045, .disable = 0x00000000}, +}; + +/* blcg pmu */ +static const struct gating_desc gv11b_blcg_pmu[] = { + {.addr = 0x0010aa70, .prod = 0x00000045, .disable = 0x00000000}, +}; + +/* blcg Xbar */ +static const struct gating_desc gv11b_blcg_xbar[] = { + {.addr = 0x0013c820, .prod = 0x0001004a, .disable = 0x00000000}, + {.addr = 0x0013dc04, .prod = 0x0001004a, .disable = 0x00000000}, + {.addr = 0x0013c920, .prod = 0x0000004a, .disable = 0x00000000}, + {.addr = 0x0013cbe0, .prod = 0x00000042, .disable = 0x00000000}, + {.addr = 0x0013cc00, .prod = 0x00000042, .disable = 0x00000000}, +}; + +/* pg gr */ +static const struct gating_desc gv11b_pg_gr[] = { +}; + +/* inline functions */ +void gv11b_slcg_bus_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_slcg_bus) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_slcg_bus[i].addr, + gv11b_slcg_bus[i].prod); + else + gk20a_writel(g, gv11b_slcg_bus[i].addr, + gv11b_slcg_bus[i].disable); + } +} + +void gv11b_slcg_ce2_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_slcg_ce2) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_slcg_ce2[i].addr, + gv11b_slcg_ce2[i].prod); + else + gk20a_writel(g, gv11b_slcg_ce2[i].addr, + gv11b_slcg_ce2[i].disable); + } +} + +void gv11b_slcg_chiplet_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_slcg_chiplet) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_slcg_chiplet[i].addr, + gv11b_slcg_chiplet[i].prod); + else + gk20a_writel(g, gv11b_slcg_chiplet[i].addr, + gv11b_slcg_chiplet[i].disable); + } +} + +void gv11b_slcg_ctxsw_firmware_load_gating_prod(struct gk20a *g, + bool prod) +{ +} + +void gv11b_slcg_fb_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_slcg_fb) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_slcg_fb[i].addr, + gv11b_slcg_fb[i].prod); + else + gk20a_writel(g, gv11b_slcg_fb[i].addr, + gv11b_slcg_fb[i].disable); + } +} + +void gv11b_slcg_fifo_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_slcg_fifo) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_slcg_fifo[i].addr, + gv11b_slcg_fifo[i].prod); + else + gk20a_writel(g, gv11b_slcg_fifo[i].addr, + gv11b_slcg_fifo[i].disable); + } +} + +void gr_gv11b_slcg_gr_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_slcg_gr) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_slcg_gr[i].addr, + gv11b_slcg_gr[i].prod); + else + gk20a_writel(g, gv11b_slcg_gr[i].addr, + gv11b_slcg_gr[i].disable); + } +} + +void ltc_gv11b_slcg_ltc_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_slcg_ltc) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_slcg_ltc[i].addr, + gv11b_slcg_ltc[i].prod); + else + gk20a_writel(g, gv11b_slcg_ltc[i].addr, + gv11b_slcg_ltc[i].disable); + } +} + +void gv11b_slcg_perf_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_slcg_perf) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_slcg_perf[i].addr, + gv11b_slcg_perf[i].prod); + else + gk20a_writel(g, gv11b_slcg_perf[i].addr, + gv11b_slcg_perf[i].disable); + } +} + +void gv11b_slcg_priring_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_slcg_priring) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_slcg_priring[i].addr, + gv11b_slcg_priring[i].prod); + else + gk20a_writel(g, gv11b_slcg_priring[i].addr, + gv11b_slcg_priring[i].disable); + } +} + +void gv11b_slcg_pwr_csb_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_slcg_pwr_csb) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_slcg_pwr_csb[i].addr, + gv11b_slcg_pwr_csb[i].prod); + else + gk20a_writel(g, gv11b_slcg_pwr_csb[i].addr, + gv11b_slcg_pwr_csb[i].disable); + } +} + +void gv11b_slcg_pmu_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_slcg_pmu) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_slcg_pmu[i].addr, + gv11b_slcg_pmu[i].prod); + else + gk20a_writel(g, gv11b_slcg_pmu[i].addr, + gv11b_slcg_pmu[i].disable); + } +} + +void gv11b_slcg_therm_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_slcg_therm) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_slcg_therm[i].addr, + gv11b_slcg_therm[i].prod); + else + gk20a_writel(g, gv11b_slcg_therm[i].addr, + gv11b_slcg_therm[i].disable); + } +} + +void gv11b_slcg_xbar_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_slcg_xbar) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_slcg_xbar[i].addr, + gv11b_slcg_xbar[i].prod); + else + gk20a_writel(g, gv11b_slcg_xbar[i].addr, + gv11b_slcg_xbar[i].disable); + } +} + +void gv11b_blcg_bus_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_blcg_bus) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_blcg_bus[i].addr, + gv11b_blcg_bus[i].prod); + else + gk20a_writel(g, gv11b_blcg_bus[i].addr, + gv11b_blcg_bus[i].disable); + } +} + +void gv11b_blcg_ce_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_blcg_ce) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_blcg_ce[i].addr, + gv11b_blcg_ce[i].prod); + else + gk20a_writel(g, gv11b_blcg_ce[i].addr, + gv11b_blcg_ce[i].disable); + } +} + +void gv11b_blcg_ctxsw_firmware_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_blcg_ctxsw_prog) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_blcg_ctxsw_prog[i].addr, + gv11b_blcg_ctxsw_prog[i].prod); + else + gk20a_writel(g, gv11b_blcg_ctxsw_prog[i].addr, + gv11b_blcg_ctxsw_prog[i].disable); + } +} + +void gv11b_blcg_fb_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_blcg_fb) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_blcg_fb[i].addr, + gv11b_blcg_fb[i].prod); + else + gk20a_writel(g, gv11b_blcg_fb[i].addr, + gv11b_blcg_fb[i].disable); + } +} + +void gv11b_blcg_fifo_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_blcg_fifo) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_blcg_fifo[i].addr, + gv11b_blcg_fifo[i].prod); + else + gk20a_writel(g, gv11b_blcg_fifo[i].addr, + gv11b_blcg_fifo[i].disable); + } +} + +void gv11b_blcg_gr_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_blcg_gr) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_blcg_gr[i].addr, + gv11b_blcg_gr[i].prod); + else + gk20a_writel(g, gv11b_blcg_gr[i].addr, + gv11b_blcg_gr[i].disable); + } +} + +void gv11b_blcg_ltc_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_blcg_ltc) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_blcg_ltc[i].addr, + gv11b_blcg_ltc[i].prod); + else + gk20a_writel(g, gv11b_blcg_ltc[i].addr, + gv11b_blcg_ltc[i].disable); + } +} + +void gv11b_blcg_pwr_csb_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_blcg_pwr_csb) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_blcg_pwr_csb[i].addr, + gv11b_blcg_pwr_csb[i].prod); + else + gk20a_writel(g, gv11b_blcg_pwr_csb[i].addr, + gv11b_blcg_pwr_csb[i].disable); + } +} + +void gv11b_blcg_pmu_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_blcg_pmu) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_blcg_pmu[i].addr, + gv11b_blcg_pmu[i].prod); + else + gk20a_writel(g, gv11b_blcg_pmu[i].addr, + gv11b_blcg_pmu[i].disable); + } +} + +void gv11b_blcg_xbar_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_blcg_xbar) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_blcg_xbar[i].addr, + gv11b_blcg_xbar[i].prod); + else + gk20a_writel(g, gv11b_blcg_xbar[i].addr, + gv11b_blcg_xbar[i].disable); + } +} + +void gr_gv11b_pg_gr_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = sizeof(gv11b_pg_gr) / sizeof(struct gating_desc); + for (i = 0; i < size; i++) { + if (prod) + gk20a_writel(g, gv11b_pg_gr[i].addr, + gv11b_pg_gr[i].prod); + else + gk20a_writel(g, gv11b_pg_gr[i].addr, + gv11b_pg_gr[i].disable); + } +} + +#endif /* __gv11b_gating_reglist_h__ */ -- cgit v1.2.2 From 8797934a2663df68c1ee0e896c173266135559f3 Mon Sep 17 00:00:00 2001 From: seshendra Gadagottu Date: Tue, 24 Jan 2017 16:55:42 -0800 Subject: gpu: nvgpu: gv11b: update clock gating prod settings Update clock gating setting till HW CL#37750038 JIRA GV11B-15 Change-Id: I98c4a157df979c944122f4a7b05e3e692a28fe2f Signed-off-by: seshendra Gadagottu Reviewed-on: http://git-master/r/1294824 GVS: Gerrit_Virtual_Submit Reviewed-by: svccoveritychecker Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c | 42 ++++++++++++-------------- 1 file changed, 20 insertions(+), 22 deletions(-) (limited to 'drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c') diff --git a/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c b/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c index 9bd40eff..13d529fe 100644 --- a/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c +++ b/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -50,7 +50,6 @@ static const struct gating_desc gv11b_slcg_chiplet[] = { static const struct gating_desc gv11b_slcg_fb[] = { {.addr = 0x00100d14, .prod = 0x00000000, .disable = 0xfffffffe}, {.addr = 0x00100c9c, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x001facb4, .prod = 0x00000000, .disable = 0x000001fe}, }; /* slcg fifo */ @@ -92,16 +91,16 @@ static const struct gating_desc gv11b_slcg_gr[] = { {.addr = 0x00419c74, .prod = 0x0000001e, .disable = 0x0000001e}, {.addr = 0x00419c84, .prod = 0x0003fffe, .disable = 0x0003fffe}, {.addr = 0x00419c8c, .prod = 0xffffff84, .disable = 0xfffffffe}, - {.addr = 0x00419c94, .prod = 0x00007ffe, .disable = 0x00007ffe}, + {.addr = 0x00419c94, .prod = 0x00000240, .disable = 0x00007ffe}, {.addr = 0x00419ca4, .prod = 0x00003ffe, .disable = 0x00003ffe}, {.addr = 0x00419cac, .prod = 0x0001fffe, .disable = 0x0001fffe}, - {.addr = 0x00419a44, .prod = 0x00000000, .disable = 0x0000000e}, - {.addr = 0x00419a4c, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00419a54, .prod = 0x00000000, .disable = 0x0000003e}, - {.addr = 0x00419a5c, .prod = 0x00000000, .disable = 0x0000000e}, - {.addr = 0x00419a64, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00419a7c, .prod = 0x00000000, .disable = 0x0000003e}, - {.addr = 0x00419a84, .prod = 0x00000000, .disable = 0x0000000e}, + {.addr = 0x00419a44, .prod = 0x00000008, .disable = 0x0000000e}, + {.addr = 0x00419a4c, .prod = 0x000001f8, .disable = 0x000001fe}, + {.addr = 0x00419a54, .prod = 0x0000003c, .disable = 0x0000003e}, + {.addr = 0x00419a5c, .prod = 0x0000000c, .disable = 0x0000000e}, + {.addr = 0x00419a64, .prod = 0x00000186, .disable = 0x000001fe}, + {.addr = 0x00419a7c, .prod = 0x0000003c, .disable = 0x0000003e}, + {.addr = 0x00419a84, .prod = 0x0000000c, .disable = 0x0000000e}, {.addr = 0x0041be2c, .prod = 0x04115fc0, .disable = 0xfffffffe}, {.addr = 0x0041bfec, .prod = 0xfffffff0, .disable = 0xfffffffe}, {.addr = 0x0041bed4, .prod = 0xfffffff8, .disable = 0xfffffffe}, @@ -186,7 +185,6 @@ static const struct gating_desc gv11b_blcg_fb[] = { {.addr = 0x00100d48, .prod = 0x0000c242, .disable = 0x00000000}, {.addr = 0x00100d1c, .prod = 0x00000042, .disable = 0x00000000}, {.addr = 0x00100c98, .prod = 0x00004242, .disable = 0x00000000}, - {.addr = 0x001facb0, .prod = 0x00004242, .disable = 0x00000000}, }; /* blcg fifo */ @@ -225,21 +223,21 @@ static const struct gating_desc gv11b_blcg_gr[] = { {.addr = 0x00418898, .prod = 0x00004242, .disable = 0x00000000}, {.addr = 0x00419868, .prod = 0x00008242, .disable = 0x00000000}, {.addr = 0x00419c70, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00419c80, .prod = 0x00000003, .disable = 0x00000000}, - {.addr = 0x00419c88, .prod = 0x00000003, .disable = 0x00000000}, - {.addr = 0x00419c90, .prod = 0x00000003, .disable = 0x00000000}, + {.addr = 0x00419c80, .prod = 0x00004048, .disable = 0x00000000}, + {.addr = 0x00419c88, .prod = 0x00004048, .disable = 0x00000000}, + {.addr = 0x00419c90, .prod = 0x00000047, .disable = 0x00000000}, {.addr = 0x00419c98, .prod = 0x00000042, .disable = 0x00000000}, {.addr = 0x00419ca0, .prod = 0x00000043, .disable = 0x00000000}, {.addr = 0x00419ca8, .prod = 0x00000003, .disable = 0x00000000}, {.addr = 0x00419cb0, .prod = 0x00000002, .disable = 0x00000000}, - {.addr = 0x00419a40, .prod = 0x00000202, .disable = 0x00000000}, - {.addr = 0x00419a48, .prod = 0x00000202, .disable = 0x00000000}, - {.addr = 0x00419a50, .prod = 0x00000202, .disable = 0x00000000}, - {.addr = 0x00419a58, .prod = 0x00000202, .disable = 0x00000000}, - {.addr = 0x00419a60, .prod = 0x00000202, .disable = 0x00000000}, - {.addr = 0x00419a68, .prod = 0x00000202, .disable = 0x00000000}, - {.addr = 0x00419a78, .prod = 0x00000202, .disable = 0x00000000}, - {.addr = 0x00419a80, .prod = 0x00000202, .disable = 0x00000000}, + {.addr = 0x00419a40, .prod = 0x00000545, .disable = 0x00000000}, + {.addr = 0x00419a48, .prod = 0x00004545, .disable = 0x00000000}, + {.addr = 0x00419a50, .prod = 0x00004545, .disable = 0x00000000}, + {.addr = 0x00419a58, .prod = 0x00004545, .disable = 0x00000000}, + {.addr = 0x00419a60, .prod = 0x00000505, .disable = 0x00000000}, + {.addr = 0x00419a68, .prod = 0x00000505, .disable = 0x00000000}, + {.addr = 0x00419a78, .prod = 0x00000505, .disable = 0x00000000}, + {.addr = 0x00419a80, .prod = 0x00004545, .disable = 0x00000000}, {.addr = 0x0041be28, .prod = 0x00008242, .disable = 0x00000000}, {.addr = 0x0041bfe8, .prod = 0x0000c444, .disable = 0x00000000}, {.addr = 0x0041bed0, .prod = 0x0000c444, .disable = 0x00000000}, -- cgit v1.2.2 From 514e7aa643317209be47a5faa6f6146152a4b6ed Mon Sep 17 00:00:00 2001 From: Deepak Goyal Date: Tue, 27 Jun 2017 12:56:15 +0530 Subject: gpu: nvgpu: gv11b: check flag before enabling CG. We should check if BLCG/SLCG feature is enabled before trying to enable/disable them in hardware. Bug 200314250 Change-Id: I5431f97cc559444298b7bd4d53a9f4fc598fd268 Signed-off-by: Deepak Goyal Reviewed-on: https://git-master/r/1509184 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Seema Khowala GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman Reviewed-by: Vijayakumar Subbu --- drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c | 96 ++++++++++++++++++++++++++ 1 file changed, 96 insertions(+) (limited to 'drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c') diff --git a/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c b/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c index 13d529fe..390d89c2 100644 --- a/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c +++ b/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c @@ -283,6 +283,10 @@ void gv11b_slcg_bus_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_slcg_bus) / sizeof(struct gating_desc); + + if (!g->slcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_slcg_bus[i].addr, @@ -298,6 +302,10 @@ void gv11b_slcg_ce2_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_slcg_ce2) / sizeof(struct gating_desc); + + if (!g->slcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_slcg_ce2[i].addr, @@ -313,6 +321,10 @@ void gv11b_slcg_chiplet_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_slcg_chiplet) / sizeof(struct gating_desc); + + if (!g->slcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_slcg_chiplet[i].addr, @@ -333,6 +345,10 @@ void gv11b_slcg_fb_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_slcg_fb) / sizeof(struct gating_desc); + + if (!g->slcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_slcg_fb[i].addr, @@ -348,6 +364,10 @@ void gv11b_slcg_fifo_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_slcg_fifo) / sizeof(struct gating_desc); + + if (!g->slcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_slcg_fifo[i].addr, @@ -363,6 +383,10 @@ void gr_gv11b_slcg_gr_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_slcg_gr) / sizeof(struct gating_desc); + + if (!g->slcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_slcg_gr[i].addr, @@ -378,6 +402,10 @@ void ltc_gv11b_slcg_ltc_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_slcg_ltc) / sizeof(struct gating_desc); + + if (!g->slcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_slcg_ltc[i].addr, @@ -393,6 +421,10 @@ void gv11b_slcg_perf_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_slcg_perf) / sizeof(struct gating_desc); + + if (!g->slcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_slcg_perf[i].addr, @@ -408,6 +440,10 @@ void gv11b_slcg_priring_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_slcg_priring) / sizeof(struct gating_desc); + + if (!g->slcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_slcg_priring[i].addr, @@ -423,6 +459,10 @@ void gv11b_slcg_pwr_csb_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_slcg_pwr_csb) / sizeof(struct gating_desc); + + if (!g->slcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_slcg_pwr_csb[i].addr, @@ -438,6 +478,10 @@ void gv11b_slcg_pmu_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_slcg_pmu) / sizeof(struct gating_desc); + + if (!g->slcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_slcg_pmu[i].addr, @@ -453,6 +497,10 @@ void gv11b_slcg_therm_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_slcg_therm) / sizeof(struct gating_desc); + + if (!g->slcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_slcg_therm[i].addr, @@ -468,6 +516,10 @@ void gv11b_slcg_xbar_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_slcg_xbar) / sizeof(struct gating_desc); + + if (!g->slcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_slcg_xbar[i].addr, @@ -483,6 +535,10 @@ void gv11b_blcg_bus_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_blcg_bus) / sizeof(struct gating_desc); + + if (!g->blcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_blcg_bus[i].addr, @@ -498,6 +554,10 @@ void gv11b_blcg_ce_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_blcg_ce) / sizeof(struct gating_desc); + + if (!g->blcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_blcg_ce[i].addr, @@ -513,6 +573,10 @@ void gv11b_blcg_ctxsw_firmware_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_blcg_ctxsw_prog) / sizeof(struct gating_desc); + + if (!g->blcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_blcg_ctxsw_prog[i].addr, @@ -528,6 +592,10 @@ void gv11b_blcg_fb_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_blcg_fb) / sizeof(struct gating_desc); + + if (!g->blcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_blcg_fb[i].addr, @@ -543,6 +611,10 @@ void gv11b_blcg_fifo_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_blcg_fifo) / sizeof(struct gating_desc); + + if (!g->blcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_blcg_fifo[i].addr, @@ -558,6 +630,10 @@ void gv11b_blcg_gr_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_blcg_gr) / sizeof(struct gating_desc); + + if (!g->blcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_blcg_gr[i].addr, @@ -573,6 +649,10 @@ void gv11b_blcg_ltc_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_blcg_ltc) / sizeof(struct gating_desc); + + if (!g->blcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_blcg_ltc[i].addr, @@ -588,6 +668,10 @@ void gv11b_blcg_pwr_csb_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_blcg_pwr_csb) / sizeof(struct gating_desc); + + if (!g->blcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_blcg_pwr_csb[i].addr, @@ -603,6 +687,10 @@ void gv11b_blcg_pmu_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_blcg_pmu) / sizeof(struct gating_desc); + + if (!g->blcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_blcg_pmu[i].addr, @@ -618,6 +706,10 @@ void gv11b_blcg_xbar_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_blcg_xbar) / sizeof(struct gating_desc); + + if (!g->blcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_blcg_xbar[i].addr, @@ -633,6 +725,10 @@ void gr_gv11b_pg_gr_load_gating_prod(struct gk20a *g, { u32 i; u32 size = sizeof(gv11b_pg_gr) / sizeof(struct gating_desc); + + if (!g->blcg_enabled) + return; + for (i = 0; i < size; i++) { if (prod) gk20a_writel(g, gv11b_pg_gr[i].addr, -- cgit v1.2.2 From 81274038a4ac4404d4697cf54278da0a5154f353 Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Tue, 11 Jul 2017 12:59:33 -0700 Subject: gpu: nvgpu: gv11b: updated clock gating prod settings Updated clock gating prod settings for HW CL 38810810 Change-Id: Ie0769edb41b46e323b042a654e6002a4f7044030 Signed-off-by: Seema Khowala Reviewed-on: https://git-master.nvidia.com/r/1517514 GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu --- drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c | 7 ------- 1 file changed, 7 deletions(-) (limited to 'drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c') diff --git a/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c b/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c index 390d89c2..3b55eb41 100644 --- a/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c +++ b/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c @@ -94,13 +94,6 @@ static const struct gating_desc gv11b_slcg_gr[] = { {.addr = 0x00419c94, .prod = 0x00000240, .disable = 0x00007ffe}, {.addr = 0x00419ca4, .prod = 0x00003ffe, .disable = 0x00003ffe}, {.addr = 0x00419cac, .prod = 0x0001fffe, .disable = 0x0001fffe}, - {.addr = 0x00419a44, .prod = 0x00000008, .disable = 0x0000000e}, - {.addr = 0x00419a4c, .prod = 0x000001f8, .disable = 0x000001fe}, - {.addr = 0x00419a54, .prod = 0x0000003c, .disable = 0x0000003e}, - {.addr = 0x00419a5c, .prod = 0x0000000c, .disable = 0x0000000e}, - {.addr = 0x00419a64, .prod = 0x00000186, .disable = 0x000001fe}, - {.addr = 0x00419a7c, .prod = 0x0000003c, .disable = 0x0000003e}, - {.addr = 0x00419a84, .prod = 0x0000000c, .disable = 0x0000000e}, {.addr = 0x0041be2c, .prod = 0x04115fc0, .disable = 0xfffffffe}, {.addr = 0x0041bfec, .prod = 0xfffffff0, .disable = 0xfffffffe}, {.addr = 0x0041bed4, .prod = 0xfffffff8, .disable = 0xfffffffe}, -- cgit v1.2.2 From d61643c0200983dc340d37962bb0a3ca900a3e97 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Mon, 25 Sep 2017 08:59:28 -0700 Subject: gpu: nvgpu: gv11b: Change license for common files to MIT Change license of OS independent source code files to MIT. JIRA NVGPU-218 Change-Id: I93c0504f0544ee8ced4898c386b3f5fbaa6a99a9 Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1567804 Reviewed-by: svc-mobile-coverity Reviewed-by: David Martinez Nieto Reviewed-by: Seshendra Gadagottu Reviewed-by: svccoveritychecker GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) (limited to 'drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c') diff --git a/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c b/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c index 3b55eb41..b9953221 100644 --- a/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c +++ b/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c @@ -1,18 +1,23 @@ /* * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License. + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. * * This file is autogenerated. Do not edit. */ -- cgit v1.2.2 From 192afccf7c9982ea47b46fd4b7ace4114ff7b45e Mon Sep 17 00:00:00 2001 From: Deepak Goyal Date: Fri, 22 Sep 2017 15:36:36 +0530 Subject: gpu: nvgpu: gv11b: skip clk gating prog for pre-si For pre-silicon platforms, clock gating should be skipped as it is not supported. Added new flags "can_"x"lcg" to check platform capability before programming SLCG,BLCG and ELCG. Bug 200314250 Change-Id: Iec7564b00b988cdd50a02f3130662727839c5047 Signed-off-by: Deepak Goyal Reviewed-on: https://git-master.nvidia.com/r/1566251 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c | 49 +++++++++++++------------- 1 file changed, 25 insertions(+), 24 deletions(-) (limited to 'drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c') diff --git a/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c b/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c index b9953221..ff4880c4 100644 --- a/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c +++ b/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c @@ -27,6 +27,7 @@ #include #include "gv11b_gating_reglist.h" +#include struct gating_desc { u32 addr; @@ -282,7 +283,7 @@ void gv11b_slcg_bus_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_slcg_bus) / sizeof(struct gating_desc); - if (!g->slcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) return; for (i = 0; i < size; i++) { @@ -301,7 +302,7 @@ void gv11b_slcg_ce2_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_slcg_ce2) / sizeof(struct gating_desc); - if (!g->slcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) return; for (i = 0; i < size; i++) { @@ -320,7 +321,7 @@ void gv11b_slcg_chiplet_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_slcg_chiplet) / sizeof(struct gating_desc); - if (!g->slcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) return; for (i = 0; i < size; i++) { @@ -344,7 +345,7 @@ void gv11b_slcg_fb_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_slcg_fb) / sizeof(struct gating_desc); - if (!g->slcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) return; for (i = 0; i < size; i++) { @@ -363,7 +364,7 @@ void gv11b_slcg_fifo_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_slcg_fifo) / sizeof(struct gating_desc); - if (!g->slcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) return; for (i = 0; i < size; i++) { @@ -382,7 +383,7 @@ void gr_gv11b_slcg_gr_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_slcg_gr) / sizeof(struct gating_desc); - if (!g->slcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) return; for (i = 0; i < size; i++) { @@ -401,7 +402,7 @@ void ltc_gv11b_slcg_ltc_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_slcg_ltc) / sizeof(struct gating_desc); - if (!g->slcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) return; for (i = 0; i < size; i++) { @@ -420,7 +421,7 @@ void gv11b_slcg_perf_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_slcg_perf) / sizeof(struct gating_desc); - if (!g->slcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) return; for (i = 0; i < size; i++) { @@ -439,7 +440,7 @@ void gv11b_slcg_priring_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_slcg_priring) / sizeof(struct gating_desc); - if (!g->slcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) return; for (i = 0; i < size; i++) { @@ -458,7 +459,7 @@ void gv11b_slcg_pwr_csb_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_slcg_pwr_csb) / sizeof(struct gating_desc); - if (!g->slcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) return; for (i = 0; i < size; i++) { @@ -477,7 +478,7 @@ void gv11b_slcg_pmu_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_slcg_pmu) / sizeof(struct gating_desc); - if (!g->slcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) return; for (i = 0; i < size; i++) { @@ -496,7 +497,7 @@ void gv11b_slcg_therm_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_slcg_therm) / sizeof(struct gating_desc); - if (!g->slcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) return; for (i = 0; i < size; i++) { @@ -515,7 +516,7 @@ void gv11b_slcg_xbar_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_slcg_xbar) / sizeof(struct gating_desc); - if (!g->slcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) return; for (i = 0; i < size; i++) { @@ -534,7 +535,7 @@ void gv11b_blcg_bus_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_blcg_bus) / sizeof(struct gating_desc); - if (!g->blcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) return; for (i = 0; i < size; i++) { @@ -553,7 +554,7 @@ void gv11b_blcg_ce_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_blcg_ce) / sizeof(struct gating_desc); - if (!g->blcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) return; for (i = 0; i < size; i++) { @@ -572,7 +573,7 @@ void gv11b_blcg_ctxsw_firmware_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_blcg_ctxsw_prog) / sizeof(struct gating_desc); - if (!g->blcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) return; for (i = 0; i < size; i++) { @@ -591,7 +592,7 @@ void gv11b_blcg_fb_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_blcg_fb) / sizeof(struct gating_desc); - if (!g->blcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) return; for (i = 0; i < size; i++) { @@ -610,7 +611,7 @@ void gv11b_blcg_fifo_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_blcg_fifo) / sizeof(struct gating_desc); - if (!g->blcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) return; for (i = 0; i < size; i++) { @@ -629,7 +630,7 @@ void gv11b_blcg_gr_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_blcg_gr) / sizeof(struct gating_desc); - if (!g->blcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) return; for (i = 0; i < size; i++) { @@ -648,7 +649,7 @@ void gv11b_blcg_ltc_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_blcg_ltc) / sizeof(struct gating_desc); - if (!g->blcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) return; for (i = 0; i < size; i++) { @@ -667,7 +668,7 @@ void gv11b_blcg_pwr_csb_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_blcg_pwr_csb) / sizeof(struct gating_desc); - if (!g->blcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) return; for (i = 0; i < size; i++) { @@ -686,7 +687,7 @@ void gv11b_blcg_pmu_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_blcg_pmu) / sizeof(struct gating_desc); - if (!g->blcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) return; for (i = 0; i < size; i++) { @@ -705,7 +706,7 @@ void gv11b_blcg_xbar_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_blcg_xbar) / sizeof(struct gating_desc); - if (!g->blcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) return; for (i = 0; i < size; i++) { @@ -724,7 +725,7 @@ void gr_gv11b_pg_gr_load_gating_prod(struct gk20a *g, u32 i; u32 size = sizeof(gv11b_pg_gr) / sizeof(struct gating_desc); - if (!g->blcg_enabled) + if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) return; for (i = 0; i < size; i++) { -- cgit v1.2.2 From 42ee5493de0ca8b0d24cbb08755b6fec2defe62f Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Thu, 21 Sep 2017 11:21:49 -0700 Subject: gpu: nvgpu: gv11b: update clock gating prod settings Updated clock gating prod settings for HW CL 39314184 i.e. snap_0913 and VDK_R11 Change-Id: Iae6fd9e95ee5e1ec20bafbb24cd761bdce8fdc5f Signed-off-by: Seema Khowala Reviewed-on: https://git-master.nvidia.com/r/1565683 Reviewed-by: Seshendra Gadagottu GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c') diff --git a/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c b/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c index ff4880c4..e648fa41 100644 --- a/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c +++ b/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c @@ -100,6 +100,13 @@ static const struct gating_desc gv11b_slcg_gr[] = { {.addr = 0x00419c94, .prod = 0x00000240, .disable = 0x00007ffe}, {.addr = 0x00419ca4, .prod = 0x00003ffe, .disable = 0x00003ffe}, {.addr = 0x00419cac, .prod = 0x0001fffe, .disable = 0x0001fffe}, + {.addr = 0x00419a44, .prod = 0x00000008, .disable = 0x0000000e}, + {.addr = 0x00419a4c, .prod = 0x000001f8, .disable = 0x000001fe}, + {.addr = 0x00419a54, .prod = 0x0000003c, .disable = 0x0000003e}, + {.addr = 0x00419a5c, .prod = 0x0000000c, .disable = 0x0000000e}, + {.addr = 0x00419a64, .prod = 0x00000186, .disable = 0x000001fe}, + {.addr = 0x00419a7c, .prod = 0x0000003c, .disable = 0x0000003e}, + {.addr = 0x00419a84, .prod = 0x0000000c, .disable = 0x0000000e}, {.addr = 0x0041be2c, .prod = 0x04115fc0, .disable = 0xfffffffe}, {.addr = 0x0041bfec, .prod = 0xfffffff0, .disable = 0xfffffffe}, {.addr = 0x0041bed4, .prod = 0xfffffff8, .disable = 0xfffffffe}, -- cgit v1.2.2 From 96cb31ea105c155b0067a09924b0c734f95b4d1a Mon Sep 17 00:00:00 2001 From: seshendra Gadagottu Date: Wed, 8 Nov 2017 14:17:59 -0800 Subject: gpu: nvgpu: gv11b: update prod settings Updated clock gating prod settings for HWCL # 39314184. This is corrected output after fixing issue in register generator tool. Bug 1994238 Change-Id: I646c4e1a134570016425367be636250205205005 Signed-off-by: seshendra Gadagottu Reviewed-on: https://git-master.nvidia.com/r/1594605 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c | 48 +++++++++++++------------- 1 file changed, 24 insertions(+), 24 deletions(-) (limited to 'drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c') diff --git a/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c b/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c index e648fa41..9f6057ae 100644 --- a/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c +++ b/drivers/gpu/nvgpu/gv11b/gv11b_gating_reglist.c @@ -41,7 +41,7 @@ static const struct gating_desc gv11b_slcg_bus[] = { /* slcg ce2 */ static const struct gating_desc gv11b_slcg_ce2[] = { - {.addr = 0x00104204, .prod = 0x00000000, .disable = 0x000007fe}, + {.addr = 0x00104204, .prod = 0x00000040, .disable = 0x000007fe}, }; /* slcg chiplet */ @@ -66,16 +66,16 @@ static const struct gating_desc gv11b_slcg_fifo[] = { /* slcg gr */ static const struct gating_desc gv11b_slcg_gr[] = { {.addr = 0x004041f4, .prod = 0x00000000, .disable = 0x07fffffe}, - {.addr = 0x0040917c, .prod = 0x00020008, .disable = 0x0003fffe}, + {.addr = 0x00409134, .prod = 0x00020008, .disable = 0x0003fffe}, {.addr = 0x00409894, .prod = 0x00000000, .disable = 0x0000fffe}, {.addr = 0x004078c4, .prod = 0x00000000, .disable = 0x000001fe}, - {.addr = 0x00406004, .prod = 0x00000000, .disable = 0x0001fffe}, + {.addr = 0x00406004, .prod = 0x00000200, .disable = 0x0001fffe}, {.addr = 0x00405864, .prod = 0x00000000, .disable = 0x000001fe}, {.addr = 0x00405910, .prod = 0xfffffff0, .disable = 0xfffffffe}, {.addr = 0x00408044, .prod = 0x00000000, .disable = 0x000007fe}, {.addr = 0x00407004, .prod = 0x00000000, .disable = 0x000001fe}, {.addr = 0x00405bf4, .prod = 0x00000000, .disable = 0x00000002}, - {.addr = 0x0041a17c, .prod = 0x00020008, .disable = 0x0003fffe}, + {.addr = 0x0041a134, .prod = 0x00020008, .disable = 0x0003fffe}, {.addr = 0x0041a894, .prod = 0x00000000, .disable = 0x0000fffe}, {.addr = 0x00418504, .prod = 0x00000000, .disable = 0x0007fffe}, {.addr = 0x0041860c, .prod = 0x00000000, .disable = 0x000001fe}, @@ -95,16 +95,16 @@ static const struct gating_desc gv11b_slcg_gr[] = { {.addr = 0x00419d24, .prod = 0x00000000, .disable = 0x000000ff}, {.addr = 0x0041986c, .prod = 0x00000104, .disable = 0x00fffffe}, {.addr = 0x00419c74, .prod = 0x0000001e, .disable = 0x0000001e}, - {.addr = 0x00419c84, .prod = 0x0003fffe, .disable = 0x0003fffe}, + {.addr = 0x00419c84, .prod = 0x0003fff8, .disable = 0x0003fffe}, {.addr = 0x00419c8c, .prod = 0xffffff84, .disable = 0xfffffffe}, - {.addr = 0x00419c94, .prod = 0x00000240, .disable = 0x00007ffe}, + {.addr = 0x00419c94, .prod = 0x00080040, .disable = 0x000ffffe}, {.addr = 0x00419ca4, .prod = 0x00003ffe, .disable = 0x00003ffe}, {.addr = 0x00419cac, .prod = 0x0001fffe, .disable = 0x0001fffe}, {.addr = 0x00419a44, .prod = 0x00000008, .disable = 0x0000000e}, {.addr = 0x00419a4c, .prod = 0x000001f8, .disable = 0x000001fe}, {.addr = 0x00419a54, .prod = 0x0000003c, .disable = 0x0000003e}, {.addr = 0x00419a5c, .prod = 0x0000000c, .disable = 0x0000000e}, - {.addr = 0x00419a64, .prod = 0x00000186, .disable = 0x000001fe}, + {.addr = 0x00419a64, .prod = 0x000001ba, .disable = 0x000001fe}, {.addr = 0x00419a7c, .prod = 0x0000003c, .disable = 0x0000003e}, {.addr = 0x00419a84, .prod = 0x0000000c, .disable = 0x0000000e}, {.addr = 0x0041be2c, .prod = 0x04115fc0, .disable = 0xfffffffe}, @@ -144,20 +144,20 @@ static const struct gating_desc gv11b_slcg_priring[] = { static const struct gating_desc gv11b_slcg_pwr_csb[] = { {.addr = 0x00000134, .prod = 0x00020008, .disable = 0x0003fffe}, {.addr = 0x00000e74, .prod = 0x00000000, .disable = 0x0000000f}, - {.addr = 0x00000a74, .prod = 0x00000000, .disable = 0x00007ffe}, - {.addr = 0x000016b8, .prod = 0x00000000, .disable = 0x0000000f}, + {.addr = 0x00000a74, .prod = 0x00004040, .disable = 0x00007ffe}, + {.addr = 0x000206b8, .prod = 0x00000008, .disable = 0x0000000f}, }; /* slcg pmu */ static const struct gating_desc gv11b_slcg_pmu[] = { {.addr = 0x0010a134, .prod = 0x00020008, .disable = 0x0003fffe}, - {.addr = 0x0010aa74, .prod = 0x00000000, .disable = 0x00007ffe}, + {.addr = 0x0010aa74, .prod = 0x00004040, .disable = 0x00007ffe}, {.addr = 0x0010ae74, .prod = 0x00000000, .disable = 0x0000000f}, }; /* therm gr */ static const struct gating_desc gv11b_slcg_therm[] = { - {.addr = 0x000206b8, .prod = 0x00000000, .disable = 0x0000000f}, + {.addr = 0x000206b8, .prod = 0x00000008, .disable = 0x0000000f}, }; /* slcg Xbar */ @@ -195,7 +195,7 @@ static const struct gating_desc gv11b_blcg_fb[] = { /* blcg fifo */ static const struct gating_desc gv11b_blcg_fifo[] = { - {.addr = 0x000026e0, .prod = 0x0000c242, .disable = 0x00000000}, + {.addr = 0x000026e0, .prod = 0x0000c244, .disable = 0x00000000}, }; /* blcg gr */ @@ -227,23 +227,23 @@ static const struct gating_desc gv11b_blcg_gr[] = { {.addr = 0x00419020, .prod = 0x0000c242, .disable = 0x00000000}, {.addr = 0x00419038, .prod = 0x00000042, .disable = 0x00000000}, {.addr = 0x00418898, .prod = 0x00004242, .disable = 0x00000000}, - {.addr = 0x00419868, .prod = 0x00008242, .disable = 0x00000000}, + {.addr = 0x00419868, .prod = 0x00008243, .disable = 0x00000000}, {.addr = 0x00419c70, .prod = 0x0000c444, .disable = 0x00000000}, - {.addr = 0x00419c80, .prod = 0x00004048, .disable = 0x00000000}, - {.addr = 0x00419c88, .prod = 0x00004048, .disable = 0x00000000}, - {.addr = 0x00419c90, .prod = 0x00000047, .disable = 0x00000000}, + {.addr = 0x00419c80, .prod = 0x00004045, .disable = 0x00000000}, + {.addr = 0x00419c88, .prod = 0x00004043, .disable = 0x00000000}, + {.addr = 0x00419c90, .prod = 0x0000004a, .disable = 0x00000000}, {.addr = 0x00419c98, .prod = 0x00000042, .disable = 0x00000000}, {.addr = 0x00419ca0, .prod = 0x00000043, .disable = 0x00000000}, {.addr = 0x00419ca8, .prod = 0x00000003, .disable = 0x00000000}, {.addr = 0x00419cb0, .prod = 0x00000002, .disable = 0x00000000}, - {.addr = 0x00419a40, .prod = 0x00000545, .disable = 0x00000000}, - {.addr = 0x00419a48, .prod = 0x00004545, .disable = 0x00000000}, - {.addr = 0x00419a50, .prod = 0x00004545, .disable = 0x00000000}, - {.addr = 0x00419a58, .prod = 0x00004545, .disable = 0x00000000}, - {.addr = 0x00419a60, .prod = 0x00000505, .disable = 0x00000000}, - {.addr = 0x00419a68, .prod = 0x00000505, .disable = 0x00000000}, - {.addr = 0x00419a78, .prod = 0x00000505, .disable = 0x00000000}, - {.addr = 0x00419a80, .prod = 0x00004545, .disable = 0x00000000}, + {.addr = 0x00419a40, .prod = 0x00000242, .disable = 0x00000000}, + {.addr = 0x00419a48, .prod = 0x00000242, .disable = 0x00000000}, + {.addr = 0x00419a50, .prod = 0x00000242, .disable = 0x00000000}, + {.addr = 0x00419a58, .prod = 0x00000242, .disable = 0x00000000}, + {.addr = 0x00419a60, .prod = 0x00000202, .disable = 0x00000000}, + {.addr = 0x00419a68, .prod = 0x00000202, .disable = 0x00000000}, + {.addr = 0x00419a78, .prod = 0x00000242, .disable = 0x00000000}, + {.addr = 0x00419a80, .prod = 0x00000242, .disable = 0x00000000}, {.addr = 0x0041be28, .prod = 0x00008242, .disable = 0x00000000}, {.addr = 0x0041bfe8, .prod = 0x0000c444, .disable = 0x00000000}, {.addr = 0x0041bed0, .prod = 0x0000c444, .disable = 0x00000000}, -- cgit v1.2.2