From db8324ff9838a0d0fee349f8c21ea5406177353a Mon Sep 17 00:00:00 2001 From: matthewb Date: Thu, 4 Oct 2018 13:34:47 -0500 Subject: gpu: nvgpu: HAL-ify pmm type broadcast values The PMM type-specific broadcast->unicast expansion calculation was using incorrect values. This caused the invalid register accesses to be generated. This change HAL-ifies the values, so that the expansion will be performed correctly. Bug 200454109 Change-Id: I96c15de27b5e16e4db2e788fd98e6bf7d6e7d564 Signed-off-by: Matthew Braun Reviewed-on: https://git-master.nvidia.com/r/1921717 GVS: Gerrit_Virtual_Submit Reviewed-by: Deepak Nibade Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv11b/gr_pri_gv11b.h | 7 ------- 1 file changed, 7 deletions(-) (limited to 'drivers/gpu/nvgpu/gv11b/gr_pri_gv11b.h') diff --git a/drivers/gpu/nvgpu/gv11b/gr_pri_gv11b.h b/drivers/gpu/nvgpu/gv11b/gr_pri_gv11b.h index 78658bf8..c71f4c9c 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_pri_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/gr_pri_gv11b.h @@ -37,13 +37,6 @@ #define NV_PERF_PMMGPC_GPCS 0x00278000 #define NV_PERF_PMMFBP_FBPS 0x0027C000 -#define NV_PERF_PMMGPCTPCA_DOMAIN_START 2 -#define NV_PERF_PMMFBP_LTC_DOMAIN_START 2 -#define NV_PERF_PMMFBP_ROP_DOMAIN_START 6 -#define NV_PERF_PMMGPC_NUM_DOMAINS 7 -#define NV_PERF_PMMFBP_LTC_NUM_DOMAINS 4 -#define NV_PERF_PMMFBP_ROP_NUM_DOMAINS 2 - #define PRI_PMMGS_ADDR_WIDTH 9 #define PRI_PMMS_ADDR_WIDTH 14 -- cgit v1.2.2