From 4314771142e0b68810b8fa86ec45b6f6b4e24651 Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Fri, 6 Apr 2018 18:26:34 +0530 Subject: gpu: nvgpu: add broadcast address decode support for volta With Volta we have more number of broadcast registers than previous chips and we don't decode them right now in gr_gk20a_decode_priv_addr() Add a new GR HAL decode_priv_addr() and set gr_gk20a_decode_priv_addr() for all previous chips Add and use gr_gv11b_decode_priv_addr() for Volta gr_gv11b_decode_priv_addr() will decode all the broadcast registers and set the broadcast flags apporiately Define below new broadcast types PRI_BROADCAST_FLAGS_PMMGPC PRI_BROADCAST_FLAGS_PMM_GPCS PRI_BROADCAST_FLAGS_PMM_GPCGS_GPCTPCA PRI_BROADCAST_FLAGS_PMM_GPCGS_GPCTPCB PRI_BROADCAST_FLAGS_PMMFBP PRI_BROADCAST_FLAGS_PMM_FBPS PRI_BROADCAST_FLAGS_PMM_FBPGS_LTC PRI_BROADCAST_FLAGS_PMM_FBPGS_ROP Bug 200398811 Jira NVGPU-556 Change-Id: Ic673b357a75b6af3d24a4c16bb5b6bc15974d5b7 Signed-off-by: Deepak Nibade Reviewed-on: https://git-master.nvidia.com/r/1690026 Reviewed-by: svc-mobile-coverity GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv11b/gr_pri_gv11b.h | 50 ++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 drivers/gpu/nvgpu/gv11b/gr_pri_gv11b.h (limited to 'drivers/gpu/nvgpu/gv11b/gr_pri_gv11b.h') diff --git a/drivers/gpu/nvgpu/gv11b/gr_pri_gv11b.h b/drivers/gpu/nvgpu/gv11b/gr_pri_gv11b.h new file mode 100644 index 00000000..c71f4c9c --- /dev/null +++ b/drivers/gpu/nvgpu/gv11b/gr_pri_gv11b.h @@ -0,0 +1,50 @@ +/* + * GV11B/GV100 Graphics Context Pri Register Addressing + * + * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#ifndef GR_PRI_GV11B_H +#define GR_PRI_GV11B_H + +/* + * These convenience macros are generally for use in the management/modificaiton + * of the context state store for gr/compute contexts. + */ + +/* Broadcast PMM defines */ +#define NV_PERF_PMMFBP_FBPGS_LTC 0x00250800 +#define NV_PERF_PMMFBP_FBPGS_ROP 0x00250A00 +#define NV_PERF_PMMGPC_GPCGS_GPCTPCA 0x00250000 +#define NV_PERF_PMMGPC_GPCGS_GPCTPCB 0x00250200 +#define NV_PERF_PMMGPC_GPCS 0x00278000 +#define NV_PERF_PMMFBP_FBPS 0x0027C000 + +#define PRI_PMMGS_ADDR_WIDTH 9 +#define PRI_PMMS_ADDR_WIDTH 14 + +/* Get the offset to be added to the chiplet base addr to get the unicast address */ +#define PRI_PMMGS_OFFSET_MASK(addr) ((addr) & ((1 << PRI_PMMGS_ADDR_WIDTH) - 1)) +#define PRI_PMMGS_BASE_ADDR_MASK(addr) ((addr) & (~((1 << PRI_PMMGS_ADDR_WIDTH) - 1))) + +#define PRI_PMMS_ADDR_MASK(addr) ((addr) & ((1 << PRI_PMMS_ADDR_WIDTH) - 1)) +#define PRI_PMMS_BASE_ADDR_MASK(addr) ((addr) & (~((1 << PRI_PMMS_ADDR_WIDTH) - 1))) + +#endif /* GR_PRI_GV11B_H */ -- cgit v1.2.2