From bdf5207583a3c8f3bd4d844548d443f1454d26f5 Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Thu, 22 Jun 2017 10:37:09 -0700 Subject: gpu: nvgpu: gv11b: init get_sm_no_lock_down_hww_global_esr_mask gr ops Support SM register changes JIRA GPUT19X-75 Change-Id: I5d5e702d681398a8a8181d912e8c691c15e265d9 Signed-off-by: Seema Khowala Reviewed-on: https://git-master/r/1514036 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'drivers/gpu/nvgpu/gv11b/gr_gv11b.c') diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index 0fcbd0d7..a726d058 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c @@ -3009,6 +3009,23 @@ static u32 gv11b_gr_get_sm_hww_global_esr(struct gk20a *g, return hww_global_esr; } +static u32 gv11b_gr_get_sm_no_lock_down_hww_global_esr_mask(struct gk20a *g) +{ + /* + * These three interrupts don't require locking down the SM. They can + * be handled by usermode clients as they aren't fatal. Additionally, + * usermode clients may wish to allow some warps to execute while others + * are at breakpoints, as opposed to fatal errors where all warps should + * halt. + */ + u32 global_esr_mask = + gr_gpc0_tpc0_sm0_hww_global_esr_bpt_int_pending_f() | + gr_gpc0_tpc0_sm0_hww_global_esr_bpt_pause_pending_f() | + gr_gpc0_tpc0_sm0_hww_global_esr_single_step_complete_pending_f(); + + return global_esr_mask; +} + void gv11b_init_gr(struct gpu_ops *gops) { gp10b_init_gr(gops); @@ -3084,4 +3101,6 @@ void gv11b_init_gr(struct gpu_ops *gops) gops->gr.resume_from_pause = gv11b_gr_resume_from_pause; gops->gr.get_sm_hww_warp_esr = gv11b_gr_get_sm_hww_warp_esr; gops->gr.get_sm_hww_global_esr = gv11b_gr_get_sm_hww_global_esr; + gops->gr.get_sm_no_lock_down_hww_global_esr_mask = + gv11b_gr_get_sm_no_lock_down_hww_global_esr_mask; } -- cgit v1.2.2