From b859393ffee2b9e29fd3a18f6fc78594fed7eda1 Mon Sep 17 00:00:00 2001 From: Sandarbh Jain Date: Thu, 27 Jul 2017 00:43:37 -0700 Subject: gpu: nvgpu: gv11b: fix no_of_sm Number of sm is being reported incorrectly. This is because we are not taking into account that each TPC have 2 sm. Bug 1951026 Change-Id: I7c666aa2a0470a14aad29ab1a80ae9d23958a743 Signed-off-by: Sandarbh Jain Reviewed-on: https://git-master.nvidia.com/r/1527771 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Alexander Lewkowicz Tested-by: Alexander Lewkowicz Reviewed-by: Vijayakumar Subbu --- drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) (limited to 'drivers/gpu/nvgpu/gv11b/gr_gv11b.c') diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index 1ba0c523..850315f7 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c @@ -2113,24 +2113,29 @@ static void gr_gv11b_detect_sm_arch(struct gk20a *g) static void gr_gv11b_init_sm_id_table(struct gk20a *g) { - u32 gpc, tpc; + u32 gpc, tpc, sm; u32 sm_id = 0; + u32 sm_per_tpc = nvgpu_get_litter_value(g, GPU_LIT_NUM_SM_PER_TPC); /* TODO populate smids based on power efficiency */ for (tpc = 0; tpc < g->gr.max_tpc_per_gpc_count; tpc++) { for (gpc = 0; gpc < g->gr.gpc_count; gpc++) { - if (tpc < g->gr.gpc_tpc_count[gpc]) { + if (tpc >= g->gr.gpc_tpc_count[gpc]) + continue; + + for (sm = 0; sm < sm_per_tpc; sm++) { g->gr.sm_to_cluster[sm_id].tpc_index = tpc; g->gr.sm_to_cluster[sm_id].gpc_index = gpc; g->gr.sm_to_cluster[sm_id].sm_index = sm_id % 2; g->gr.sm_to_cluster[sm_id].global_tpc_index = - sm_id; + tpc; sm_id++; } } } g->gr.no_of_sm = sm_id; + nvgpu_log_info(g, " total number of sm = %d", g->gr.no_of_sm); } static void gr_gv11b_program_sm_id_numbering(struct gk20a *g, @@ -2156,7 +2161,7 @@ static int gr_gv11b_load_smid_config(struct gk20a *g) u32 *tpc_sm_id; u32 i, j; u32 tpc_index, gpc_index, tpc_id; - u32 sms_per_tpc = nvgpu_get_litter_value(g, GPU_LIT_NUM_SM_PER_TPC); + u32 sm_per_tpc = nvgpu_get_litter_value(g, GPU_LIT_NUM_SM_PER_TPC); int num_gpcs = nvgpu_get_litter_value(g, GPU_LIT_NUM_GPCS); tpc_sm_id = kcalloc(gr_cwd_sm_id__size_1_v(), sizeof(u32), GFP_KERNEL); @@ -2174,7 +2179,7 @@ static int gr_gv11b_load_smid_config(struct gk20a *g) u32 bits; tpc_id = (i << 2) + j; - sm_id = tpc_id * sms_per_tpc; + sm_id = tpc_id * sm_per_tpc; if (sm_id >= g->gr.no_of_sm) break; -- cgit v1.2.2