From 4dbf6f7bd600750461d6e747c00df99999e2be2f Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Mon, 13 Nov 2017 13:05:13 +0530 Subject: gpu: nvgpu: define preemption modes in common code Use common preemption modes in common code instead of using linux specific definitions Jira NVGPU-392 Change-Id: Iff65ab4278973f2e2d7db33f6fedb561b2164c42 Signed-off-by: Deepak Nibade Reviewed-on: https://git-master.nvidia.com/r/1596931 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/gpu/nvgpu/gv11b/gr_gv11b.c') diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index 3a3406f9..3d817d7e 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c @@ -1765,7 +1765,7 @@ int gr_gv11b_pre_process_sm_exception(struct gk20a *g, if (fault_ch) cilp_enabled = (fault_ch->ch_ctx.gr_ctx->compute_preempt_mode == - NVGPU_COMPUTE_PREEMPTION_MODE_CILP); + NVGPU_PREEMPTION_MODE_COMPUTE_CILP); gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg, "SM Exception received on gpc %d tpc %d sm %d = 0x%08x", -- cgit v1.2.2