From f720b309f1ea87a301bcb216983396f3d9c55abc Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Thu, 14 Sep 2017 05:48:07 -0700 Subject: gpu: nvgpu: add tsg_verify_status_faulted operation Add new API gv11b_fifo_tsg_verify_status_faulted() and use that as g->ops.fifo.tsg_verify_status_faulted operation for gv11b/gv100 This API will check if channel has ENG_FAULTED status set, if yes it will clear CE method buffer in case saved out channel is same as faulted channel We need to write 0 to method count to invalidate CE method buffer Also set g->ops.fifo.tsg_verify_status_ctx_reload operation for gv11b/gv100 Bug 200327095 Change-Id: I9d2b0f13faf881b30680219bbcadfd4969c4dff6 Signed-off-by: Deepak Nibade Reviewed-on: https://git-master.nvidia.com/r/1560643 Reviewed-by: svc-mobile-coverity GVS: Gerrit_Virtual_Submit Reviewed-by: Seshendra Gadagottu Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) (limited to 'drivers/gpu/nvgpu/gv11b/fifo_gv11b.c') diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c index 1d5e593c..b4e4b875 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c @@ -1811,3 +1811,38 @@ void gv11b_mmu_fault_id_to_eng_pbdma_id_and_veid(struct gk20a *g, else *pbdma_id = FIFO_INVAL_PBDMA_ID; } + +static bool gk20a_fifo_channel_status_is_eng_faulted(struct gk20a *g, u32 chid) +{ + u32 channel = gk20a_readl(g, ccsr_channel_r(chid)); + + return ccsr_channel_eng_faulted_v(channel) == + ccsr_channel_eng_faulted_true_v(); +} + +void gv11b_fifo_tsg_verify_status_faulted(struct channel_gk20a *ch) +{ + struct gk20a *g = ch->g; + struct tsg_gk20a *tsg = &g->fifo.tsg[ch->tsgid]; + + /* + * If channel has FAULTED set, clear the CE method buffer + * if saved out channel is same as faulted channel + */ + if (!gk20a_fifo_channel_status_is_eng_faulted(g, ch->chid)) + return; + + if (tsg->eng_method_buffers == NULL) + return; + + /* + * CE method buffer format : + * DWord0 = method count + * DWord1 = channel id + * + * It is sufficient to write 0 to method count to invalidate + */ + if ((u32)ch->chid == + nvgpu_mem_rd32(g, &tsg->eng_method_buffers[ASYNC_CE_RUNQUE], 1)) + nvgpu_mem_wr32(g, &tsg->eng_method_buffers[ASYNC_CE_RUNQUE], 0, 0); +} -- cgit v1.2.2