From f0cbe19b12524f5df6466eaf86acbfb349def6b1 Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Tue, 16 Jan 2018 03:07:37 -0800 Subject: gpu: nvgpu: add user API to get read-only syncpoint address map Add User space API NVGPU_AS_IOCTL_GET_SYNC_RO_MAP to get read-only syncpoint address map in user space We already map whole syncpoint shim to each address space with base address being vm->syncpt_ro_map_gpu_va This new API exposes this base GPU_VA address of syncpoint map, and unit size of each syncpoint to user space. User space can then calculate address of each syncpoint as syncpoint_address = base_gpu_va + (syncpoint_id * syncpoint_unit_size) Note that this syncpoint address is read_only, and should be only used for inserting semaphore acquires. Adding semaphore release with this address would result in MMU_FAULT Define new HAL g->ops.fifo.get_sync_ro_map and set this for all GPUs supported on Xavier SoC Bug 200327559 Change-Id: Ica0db48fc28fdd0ff2a5eb09574dac843dc5e4fd Signed-off-by: Deepak Nibade Reviewed-on: https://git-master.nvidia.com/r/1649365 Reviewed-by: svc-mobile-coverity GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | 56 +++++++++++++++++++++++++++--------- 1 file changed, 43 insertions(+), 13 deletions(-) (limited to 'drivers/gpu/nvgpu/gv11b/fifo_gv11b.c') diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c index 271dcc41..41d14a82 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c @@ -1657,31 +1657,43 @@ void gv11b_fifo_deinit_eng_method_buffers(struct gk20a *g, } #ifdef CONFIG_TEGRA_GK20A_NVHOST +static int set_syncpt_ro_map_gpu_va_locked(struct vm_gk20a *vm) +{ + struct gk20a *g = gk20a_from_vm(vm); + + if (vm->syncpt_ro_map_gpu_va) + return 0; + + vm->syncpt_ro_map_gpu_va = nvgpu_gmmu_map(vm, + &g->syncpt_mem, g->syncpt_unit_size, + 0, gk20a_mem_flag_read_only, + false, APERTURE_SYSMEM); + + if (!vm->syncpt_ro_map_gpu_va) { + nvgpu_err(g, "failed to ro map syncpt buffer"); + return -ENOMEM; + } + + return 0; +} + int gv11b_fifo_alloc_syncpt_buf(struct channel_gk20a *c, u32 syncpt_id, struct nvgpu_mem *syncpt_buf) { u32 nr_pages; int err = 0; struct gk20a *g = c->g; - struct vm_gk20a *vm = c->vm; /* * Add ro map for complete sync point shim range in vm * All channels sharing same vm will share same ro mapping. * Create rw map for current channel sync point */ - if (!vm->syncpt_ro_map_gpu_va) { - vm->syncpt_ro_map_gpu_va = nvgpu_gmmu_map(c->vm, - &g->syncpt_mem, g->syncpt_unit_size, - 0, gk20a_mem_flag_read_only, - false, APERTURE_SYSMEM); - - if (!vm->syncpt_ro_map_gpu_va) { - nvgpu_err(g, "failed to ro map syncpt buffer"); - nvgpu_dma_free(g, &g->syncpt_mem); - err = -ENOMEM; - } - } + nvgpu_mutex_acquire(&c->vm->syncpt_ro_map_lock); + err = set_syncpt_ro_map_gpu_va_locked(c->vm); + nvgpu_mutex_release(&c->vm->syncpt_ro_map_lock); + if (err) + return err; nr_pages = DIV_ROUND_UP(g->syncpt_size, PAGE_SIZE); __nvgpu_mem_create_from_phys(g, syncpt_buf, @@ -1707,6 +1719,24 @@ void gv11b_fifo_free_syncpt_buf(struct channel_gk20a *c, nvgpu_dma_free(c->g, syncpt_buf); } +int gv11b_fifo_get_sync_ro_map(struct vm_gk20a *vm, + u64 *base_gpuva, u32 *sync_size) +{ + struct gk20a *g = gk20a_from_vm(vm); + int err; + + nvgpu_mutex_acquire(&vm->syncpt_ro_map_lock); + err = set_syncpt_ro_map_gpu_va_locked(vm); + nvgpu_mutex_release(&vm->syncpt_ro_map_lock); + if (err) + return err; + + *base_gpuva = vm->syncpt_ro_map_gpu_va; + *sync_size = g->syncpt_size; + + return 0; +} + void gv11b_fifo_add_syncpt_wait_cmd(struct gk20a *g, struct priv_cmd_entry *cmd, u32 off, u32 id, u32 thresh, u64 gpu_va_base) -- cgit v1.2.2