From 418f31cd91a5c3ca45f0920ed64205def49c8a80 Mon Sep 17 00:00:00 2001 From: Alex Waterman Date: Tue, 6 Mar 2018 10:43:16 -0800 Subject: gpu: nvgpu: Enable IO coherency on GV100 This reverts commit 848af2ce6de6140323a6ffe3075bf8021e119434. This is a revert of a revert, etc, etc. It re-enables IO coherence again. JIRA EVLR-2333 Change-Id: Ibf97dce2f892e48a1200a06cd38a1c5d9603be04 Signed-off-by: Alex Waterman Reviewed-on: https://git-master.nvidia.com/r/1669722 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv11b/acr_gv11b.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/nvgpu/gv11b/acr_gv11b.c') diff --git a/drivers/gpu/nvgpu/gv11b/acr_gv11b.c b/drivers/gpu/nvgpu/gv11b/acr_gv11b.c index 799b2db4..4fa3f324 100644 --- a/drivers/gpu/nvgpu/gv11b/acr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/acr_gv11b.c @@ -27,9 +27,10 @@ #include #include #include -#include #include #include +#include +#include #include "gk20a/gk20a.h" #include "acr_gv11b.h" @@ -220,7 +221,9 @@ static int bl_bootstrap(struct nvgpu_pmu *pmu, pwr_pmu_new_instblk_ptr_f( nvgpu_inst_block_addr(g, &mm->pmu.inst_block) >> 12) | pwr_pmu_new_instblk_valid_f(1) | - pwr_pmu_new_instblk_target_sys_ncoh_f()); + (nvgpu_is_enabled(g, NVGPU_USE_COHERENT_SYSMEM) ? + pwr_pmu_new_instblk_target_sys_coh_f() : + pwr_pmu_new_instblk_target_sys_ncoh_f())) ; /*copy bootloader interface structure to dmem*/ nvgpu_flcn_copy_to_dmem(pmu->flcn, 0, (u8 *)pbl_desc, -- cgit v1.2.2