From e486ff45d02ae1ee286a1bc100157487cc9b029b Mon Sep 17 00:00:00 2001 From: Tejal Kudav Date: Wed, 8 Aug 2018 15:49:35 +0530 Subject: gpu: nvgpu: Remove switching alt_clk to slowclk nvlink alt_clk switch defaults to slowclk; the init value of register field is slowclk. So we need not program the register field 'clk_alt_switchfinalsel'. Also the code lines were not taking effect as the value is not written back to the register. JIRA NVGPU-966 Change-Id: I75904e94a8e113c17fb3bf8c414174c549ad893e Signed-off-by: Tejal Kudav Reviewed-on: https://git-master.nvidia.com/r/1795050 Reviewed-by: svc-misra-checker Reviewed-by: svccoveritychecker GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv100/nvlink_gv100.c | 3 --- 1 file changed, 3 deletions(-) (limited to 'drivers/gpu/nvgpu/gv100') diff --git a/drivers/gpu/nvgpu/gv100/nvlink_gv100.c b/drivers/gpu/nvgpu/gv100/nvlink_gv100.c index b945b902..b51fc6fa 100644 --- a/drivers/gpu/nvgpu/gv100/nvlink_gv100.c +++ b/drivers/gpu/nvgpu/gv100/nvlink_gv100.c @@ -1533,9 +1533,6 @@ static void gv100_nvlink_prog_alt_clk(struct gk20a *g) tmp &= ~trim_sys_nvl_common_clk_alt_switch_slowclk_m(); tmp |= trim_sys_nvl_common_clk_alt_switch_slowclk_xtal4x_f(); gk20a_writel(g, trim_sys_nvl_common_clk_alt_switch_r(), tmp); - - tmp &= ~trim_sys_nvl_common_clk_alt_switch_finalsel_m(); - tmp |= trim_sys_nvl_common_clk_alt_switch_finalsel_slowclk_f(); } static int gv100_nvlink_enable_links_pre_top(struct gk20a *g, u32 links) -- cgit v1.2.2