From a3356b8ad7ce625c02d7679aefe64185c84fe9a7 Mon Sep 17 00:00:00 2001 From: Tejal Kudav Date: Sun, 3 Jun 2018 16:10:17 +0530 Subject: gpu: nvgpu: nvlink: Add HAL for minion INIT* dlcmd The sequence of INIT* minion dlcmd varies between nvlink 2.0 and 2.2. The order is strict for 2.2. Also there are new dlcmds added to the nvlink bringup sequence. Add HAL to allow sequence update for nvlink 2.2. Old sequence: INITLANEENABLE-> INITDLPL New Sequence: INITDLPL->INITDLPL_TO_CHIPA->INITTL->INITLANEENABLE JIRA NVLINK-176 Change-Id: I49e0a726f56e7d6122ac4cddf0f0e021d16f1926 Signed-off-by: Tejal Kudav Reviewed-on: https://git-master.nvidia.com/r/1738329 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv100/hal_gv100.c | 1 + drivers/gpu/nvgpu/gv100/nvlink_gv100.c | 33 ++++++++++++++++----------------- drivers/gpu/nvgpu/gv100/nvlink_gv100.h | 2 ++ 3 files changed, 19 insertions(+), 17 deletions(-) (limited to 'drivers/gpu/nvgpu/gv100') diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index 2f5cf7f3..5e42ba9f 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c @@ -842,6 +842,7 @@ static const struct gpu_ops gv100_ops = { .isr = gv100_nvlink_isr, .rxdet = NULL, .setup_pll = gv100_nvlink_setup_pll, + .minion_data_ready_en = gv100_nvlink_minion_data_ready_en, /* API */ .link_early_init = gv100_nvlink_link_early_init, .link_get_state = gv100_nvlink_link_get_state, diff --git a/drivers/gpu/nvgpu/gv100/nvlink_gv100.c b/drivers/gpu/nvgpu/gv100/nvlink_gv100.c index c87a3ce9..cae4f9bd 100644 --- a/drivers/gpu/nvgpu/gv100/nvlink_gv100.c +++ b/drivers/gpu/nvgpu/gv100/nvlink_gv100.c @@ -221,8 +221,6 @@ static const char *__gv100_device_type_to_str(u32 type) */ static u32 __gv100_nvlink_get_link_reset_mask(struct gk20a *g); static u32 gv100_nvlink_rxcal_en(struct gk20a *g, unsigned long mask); -static u32 gv100_nvlink_minion_data_ready_en(struct gk20a *g, - unsigned long mask, bool sync); /* @@ -876,31 +874,32 @@ static u32 gv100_nvlink_minion_configure_ac_coupling(struct gk20a *g, /* * Set Data ready */ -static u32 gv100_nvlink_minion_data_ready_en(struct gk20a *g, - unsigned long mask, bool sync) +int gv100_nvlink_minion_data_ready_en(struct gk20a *g, + unsigned long link_mask, bool sync) { - u32 err = 0; - u32 i; + int ret = 0; + u32 link_id; - for_each_set_bit(i, &mask, 32) { - err = gv100_nvlink_minion_send_command(g, i, + for_each_set_bit(link_id, &link_mask, 32) { + ret = gv100_nvlink_minion_send_command(g, link_id, minion_nvlink_dl_cmd_command_initlaneenable_v(), 0, sync); - if (err) { - nvgpu_err(g, "Failed init lane enable on minion"); - return err; + if (ret) { + nvgpu_err(g, "Failed initlaneenable on link %u", + link_id); + return ret; } } - for_each_set_bit(i, &mask, 32) { - err = gv100_nvlink_minion_send_command(g, i, + for_each_set_bit(link_id, &link_mask, 32) { + ret = gv100_nvlink_minion_send_command(g, link_id, minion_nvlink_dl_cmd_command_initdlpl_v(), 0, sync); - if (err) { - nvgpu_err(g, "Failed init DLPL on minion"); - return err; + if (ret) { + nvgpu_err(g, "Failed initdlpl on link %u", link_id); + return ret; } } - return err; + return ret; } /* diff --git a/drivers/gpu/nvgpu/gv100/nvlink_gv100.h b/drivers/gpu/nvgpu/gv100/nvlink_gv100.h index 0c58438c..bf923d4b 100644 --- a/drivers/gpu/nvgpu/gv100/nvlink_gv100.h +++ b/drivers/gpu/nvgpu/gv100/nvlink_gv100.h @@ -32,6 +32,8 @@ int gv100_nvlink_isr(struct gk20a *g); int gv100_nvlink_minion_send_command(struct gk20a *g, u32 link_id, u32 command, u32 scratch_0, bool sync); int gv100_nvlink_setup_pll(struct gk20a *g, unsigned long link_mask); +int gv100_nvlink_minion_data_ready_en(struct gk20a *g, + unsigned long link_mask, bool sync); /* API */ int gv100_nvlink_link_early_init(struct gk20a *g, unsigned long mask); u32 gv100_nvlink_link_get_mode(struct gk20a *g, u32 link_id); -- cgit v1.2.2