From 9beefc45516097db2eabf2887ff66d3334ff9fde Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Fri, 19 Jan 2018 14:47:47 -0800 Subject: gpu: nvgpu: add fecs_host_int_enable hal This will be used to enable fecs interrupts per chip. Change-Id: Id99412ca1a9c4caad999c3458b0e9701515db4b9 Signed-off-by: Seema Khowala Reviewed-on: https://git-master.nvidia.com/r/1642554 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv100/hal_gv100.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/nvgpu/gv100') diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index 22e07288..a2b97520 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c @@ -425,6 +425,7 @@ static const struct gpu_ops gv100_ops = { .handle_tpc_sm_ecc_exception = gr_gv11b_handle_tpc_sm_ecc_exception, .decode_egpc_addr = gv11b_gr_decode_egpc_addr, + .fecs_host_int_enable = gr_gv11b_fecs_host_int_enable, }, .fb = { .reset = gv100_fb_reset, -- cgit v1.2.2